| /linux/arch/arm/mach-omap1/ |
| H A D | mux.c | 30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
40 MUX_CFG("UART3_TX", 6, 0, 1, 0, 30, 0, NA, 0, 0)
41 MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0)
42 MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0)
43 MUX_CFG("UART3_RTS", 5, 15, 2, 0, 25, 0, NA, 0, 0)
[all …]
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| H A D | mux.h | 75 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \ macro
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| /linux/drivers/clk/stm32/ |
| H A D | clk-stm32mp25.c | 200 #define MUX_CFG(id, _offset, _shift, _witdh) \ macro
208 MUX_CFG(MUX_ADC12, RCC_ADC12CFGR, 12, 1),
209 MUX_CFG(MUX_ADC3, RCC_ADC3CFGR, 12, 2),
210 MUX_CFG(MUX_DSIBLANE, RCC_DSICFGR, 12, 1),
211 MUX_CFG(MUX_DSIPHY, RCC_DSICFGR, 15, 1),
212 MUX_CFG(MUX_DTS, RCC_DTSCFGR, 12, 2),
213 MUX_CFG(MUX_LVDSPHY, RCC_LVDSCFGR, 15, 1),
214 MUX_CFG(MUX_MCO1, RCC_MCO1CFGR, 0, 1),
215 MUX_CFG(MUX_MCO2, RCC_MCO2CFGR, 0, 1),
216 MUX_CFG(MUX_USB2PHY1, RCC_USB2PHY1CFGR, 15, 1),
[all …]
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| H A D | clk-stm32mp21.c | 166 #define MUX_CFG(id, _offset, _shift, _width) \ macro
174 MUX_CFG(MUX_ADC1, RCC_ADC1CFGR, 12, 1),
175 MUX_CFG(MUX_ADC2, RCC_ADC2CFGR, 12, 2),
176 MUX_CFG(MUX_DTS, RCC_DTSCFGR, 12, 2),
177 MUX_CFG(MUX_MCO1, RCC_MCO1CFGR, 0, 1),
178 MUX_CFG(MUX_MCO2, RCC_MCO2CFGR, 0, 1),
179 MUX_CFG(MUX_USB2PHY1, RCC_USB2PHY1CFGR, 15, 1),
180 MUX_CFG(MUX_USB2PHY2, RCC_USB2PHY2CFGR, 15, 1),
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| /linux/arch/arm/mach-davinci/ |
| H A D | mux.h | 259 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ macro
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