Searched refs:MSR_IA32_MISC_ENABLE_TM1 (Results 1 – 3 of 3) sorted by relevance
1024 if ((val.l & MSR_IA32_MISC_ENABLE_TM1) && (val.h & APIC_DM_SMI)) { in intel_init_thermal()1081 wrmsrq(MSR_IA32_MISC_ENABLE, val.q | MSR_IA32_MISC_ENABLE_TM1); in intel_init_thermal()
1086 #define MSR_IA32_MISC_ENABLE_TM1 (1ULL << MSR_IA32_MISC_ENABLE_TM1_BIT) macro
8380 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-", in decode_misc_enable_msr()