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Searched refs:MSR_IA32_MISC_ENABLE (Results 1 – 14 of 14) sorted by relevance

/linux/arch/x86/kernel/acpi/
H A Dsleep.c98 if (!rdmsr_safe(MSR_IA32_MISC_ENABLE, in x86_acpi_suspend_lowlevel()
101 !wrmsr_safe(MSR_IA32_MISC_ENABLE, in x86_acpi_suspend_lowlevel()
/linux/drivers/cpufreq/
H A De_powersaver.c228 rdmsrl(MSR_IA32_MISC_ENABLE, val); in eps_cpu_init()
231 wrmsrl(MSR_IA32_MISC_ENABLE, val); in eps_cpu_init()
233 rdmsrl(MSR_IA32_MISC_ENABLE, val); in eps_cpu_init()
H A Dspeedstep-centrino.c381 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in centrino_cpu_init()
386 wrmsr(MSR_IA32_MISC_ENABLE, l, h); in centrino_cpu_init()
389 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in centrino_cpu_init()
/linux/arch/x86/kernel/cpu/
H A Dintel.c205 if (msr_clear_bit(MSR_IA32_MISC_ENABLE, MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT) > 0) in intel_unlock_cpuid_leafs()
305 rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); in early_init_intel()
435 if (msr_set_bit(MSR_IA32_MISC_ENABLE, in intel_workarounds()
545 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); in init_intel()
H A Daperfmperf.c102 err = rdmsrl_safe(MSR_IA32_MISC_ENABLE, &misc_en); in turbo_disabled()
/linux/arch/x86/power/
H A Dcpu.c127 ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, in __save_processor_state()
200 wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable); in __restore_processor_state()
/linux/tools/testing/selftests/kvm/x86_64/
H A Dmonitor_mwait_test.c
/linux/drivers/thermal/intel/
H A Dtherm_throt.c730 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in intel_init_thermal()
807 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in intel_init_thermal()
808 wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h); in intel_init_thermal()
/linux/arch/x86/realmode/rm/
H A Dwakeup_asm.S103 movl $MSR_IA32_MISC_ENABLE, %ecx
/linux/arch/x86/kernel/
H A Dverify_cpu.S93 movl $MSR_IA32_MISC_ENABLE, %ecx
/linux/tools/power/x86/x86_energy_perf_policy/
H A Dx86_energy_perf_policy.c1197 get_msr(cpu, MSR_IA32_MISC_ENABLE, &msr); in update_cpu_msrs()
1204 put_msr(cpu, MSR_IA32_MISC_ENABLE, msr); in update_cpu_msrs()
1215 put_msr(cpu, MSR_IA32_MISC_ENABLE, msr); in update_cpu_msrs()
/linux/tools/arch/x86/include/asm/
H A Dmsr-index.h925 #define MSR_IA32_MISC_ENABLE 0x000001a0 macro
/linux/arch/x86/events/intel/
H A Dp4.c1375 rdmsr(MSR_IA32_MISC_ENABLE, low, high); in p4_pmu_init()
/linux/tools/power/x86/turbostat/
H A Dturbostat.c7444 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr)) in decode_misc_enable_msr()