Searched refs:MSR_IA32_APICBASE_ENABLE (Results 1 – 7 of 7) sorted by relevance
12 ~(MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD)); in apic_disable()23 rdmsr(MSR_IA32_APICBASE) | MSR_IA32_APICBASE_ENABLE); in xapic_enable()24 } else if (!(val & MSR_IA32_APICBASE_ENABLE)) { in xapic_enable()25 wrmsr(MSR_IA32_APICBASE, val | MSR_IA32_APICBASE_ENABLE); in xapic_enable()40 MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD); in x2apic_enable()
185 TEST_ASSERT(apic_base & MSR_IA32_APICBASE_ENABLE, in test_apic_id()206 vcpu_set_msr(vcpu, MSR_IA32_APICBASE, MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in test_x2apic_id()
20 #define MSR_IA32_APICBASE_ENABLE (1<<11) macro
1196 l &= ~MSR_IA32_APICBASE_ENABLE; in disable_local_APIC()1978 if (l & MSR_IA32_APICBASE_ENABLE) in apic_verify()2001 if (!(l & MSR_IA32_APICBASE_ENABLE)) { in apic_force_enable()2004 l |= MSR_IA32_APICBASE_ENABLE | addr; in apic_force_enable()2479 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; in lapic_resume()
971 #define MSR_IA32_APICBASE_ENABLE (1<<11) macro
961 #define MSR_IA32_APICBASE_ENABLE (1<<11) macro
301 vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE); in kvm_update_cpuid_runtime()