Searched refs:MSR_IA32_APICBASE_ENABLE (Results 1 – 10 of 10) sorted by relevance
12 ~(MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD)); in apic_disable()23 rdmsr(MSR_IA32_APICBASE) | MSR_IA32_APICBASE_ENABLE); in xapic_enable()24 } else if (!(val & MSR_IA32_APICBASE_ENABLE)) { in xapic_enable()25 wrmsr(MSR_IA32_APICBASE, val | MSR_IA32_APICBASE_ENABLE); in xapic_enable()40 MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD); in x2apic_enable()
27 LAPIC_MODE_XAPIC = MSR_IA32_APICBASE_ENABLE,28 LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE,196 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled()271 return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in kvm_apic_mode()
2527 if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)) in kvm_free_lapic()2587 if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE) in kvm_lapic_set_base()2594 if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE) { in kvm_lapic_set_base()2595 if (value & MSR_IA32_APICBASE_ENABLE) { in kvm_lapic_set_base()2609 else if (value & MSR_IA32_APICBASE_ENABLE) in kvm_lapic_set_base()2613 if ((old_value ^ value) & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) { in kvm_lapic_set_base()2621 if ((value & MSR_IA32_APICBASE_ENABLE) && in kvm_lapic_set_base()2728 msr_val = APIC_DEFAULT_PHYS_BASE | MSR_IA32_APICBASE_ENABLE; in kvm_lapic_reset()2900 vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE; in kvm_create_lapic()
286 vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE); in __kvm_update_cpuid_runtime()
185 TEST_ASSERT(apic_base & MSR_IA32_APICBASE_ENABLE, in test_apic_id()206 vcpu_set_msr(vcpu, MSR_IA32_APICBASE, MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in test_x2apic_id()
18 #define LAPIC_X2APIC (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)
22 #define MSR_IA32_APICBASE_ENABLE (1<<11) macro
1181 l &= ~MSR_IA32_APICBASE_ENABLE; in disable_local_APIC()1965 if (l & MSR_IA32_APICBASE_ENABLE) in apic_verify()1988 if (!(l & MSR_IA32_APICBASE_ENABLE)) { in apic_force_enable()1991 l |= MSR_IA32_APICBASE_ENABLE | addr; in apic_force_enable()2461 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; in lapic_resume()
881 #define MSR_IA32_APICBASE_ENABLE (1<<11) macro