Searched refs:MSR_IA32_APICBASE_ENABLE (Results 1 – 6 of 6) sorted by relevance
31 LAPIC_MODE_XAPIC = MSR_IA32_APICBASE_ENABLE,32 LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE,183 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled()249 return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in kvm_apic_mode()
2642 if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)) in kvm_free_lapic()2702 if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE) in __kvm_apic_set_base()2709 if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE) { in __kvm_apic_set_base()2710 if (value & MSR_IA32_APICBASE_ENABLE) { in __kvm_apic_set_base()2724 else if (value & MSR_IA32_APICBASE_ENABLE) in __kvm_apic_set_base()2728 if ((old_value ^ value) & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) { in __kvm_apic_set_base()2736 if ((value & MSR_IA32_APICBASE_ENABLE) && in __kvm_apic_set_base()2861 msr_val = APIC_DEFAULT_PHYS_BASE | MSR_IA32_APICBASE_ENABLE; in kvm_lapic_reset()3038 vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE; in kvm_create_lapic()
298 vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE); in kvm_update_cpuid_runtime()
185 TEST_ASSERT(apic_base & MSR_IA32_APICBASE_ENABLE, in test_apic_id()206 vcpu_set_msr(vcpu, MSR_IA32_APICBASE, MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in test_x2apic_id()
1191 l &= ~MSR_IA32_APICBASE_ENABLE; in disable_local_APIC()1972 if (l & MSR_IA32_APICBASE_ENABLE) in apic_verify()1995 if (!(l & MSR_IA32_APICBASE_ENABLE)) { in apic_force_enable()1998 l |= MSR_IA32_APICBASE_ENABLE | addr; in apic_force_enable()2468 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; in lapic_resume()
952 #define MSR_IA32_APICBASE_ENABLE (1<<11) macro