Searched refs:MSR_FE0 (Results 1 – 5 of 5) sorted by relevance
292 .fpexc_mode = MSR_FE0 | MSR_FE1, \300 .fpexc_mode = MSR_FE0 | MSR_FE1, \354 return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); in __unpack_fe01()359 return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1); in __pack_fe01()
99 #define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */ macro
387 regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX)); in __unsafe_restore_sigcontext()506 regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX)); in restore_tm_sigcontexts()
536 regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1)); in restore_user_regs()617 regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1)); in restore_tm_user_regs()
238 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE | in kvmppc_recalc_shadow_msr()241 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE; in kvmppc_recalc_shadow_msr()585 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1); in kvmppc_set_pvr_pr()