Searched refs:MSR_F15H_PERF_CTR (Results 1 – 4 of 4) sorted by relevance
51 if (msr >= MSR_F15H_PERF_CTR) in nmi_perfctr_msr_to_bit()52 return (msr - MSR_F15H_PERF_CTR) >> 1; in nmi_perfctr_msr_to_bit()
841 #define MSR_F15H_PERF_CTR 0xc0010201 macro842 #define MSR_F15H_PERF_CTR0 MSR_F15H_PERF_CTR843 #define MSR_F15H_PERF_CTR1 (MSR_F15H_PERF_CTR + 2)844 #define MSR_F15H_PERF_CTR2 (MSR_F15H_PERF_CTR + 4)845 #define MSR_F15H_PERF_CTR3 (MSR_F15H_PERF_CTR + 6)846 #define MSR_F15H_PERF_CTR4 (MSR_F15H_PERF_CTR + 8)847 #define MSR_F15H_PERF_CTR5 (MSR_F15H_PERF_CTR + 10)
831 #define MSR_F15H_PERF_CTR 0xc0010201 macro832 #define MSR_F15H_PERF_CTR0 MSR_F15H_PERF_CTR833 #define MSR_F15H_PERF_CTR1 (MSR_F15H_PERF_CTR + 2)834 #define MSR_F15H_PERF_CTR2 (MSR_F15H_PERF_CTR + 4)835 #define MSR_F15H_PERF_CTR3 (MSR_F15H_PERF_CTR + 6)836 #define MSR_F15H_PERF_CTR4 (MSR_F15H_PERF_CTR + 8)837 #define MSR_F15H_PERF_CTR5 (MSR_F15H_PERF_CTR + 10)
764 svm_set_intercept_for_msr(vcpu, MSR_F15H_PERF_CTR + 2 * i, in svm_recalc_pmu_msr_intercepts()768 svm_enable_intercept_for_msr(vcpu, MSR_F15H_PERF_CTR + 2 * i, in svm_recalc_pmu_msr_intercepts()