| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | msi.txt | 1 This document describes the generic device tree binding for MSI controllers and 9 those busses to the MSI controllers which they are capable of using, 17 they can address. An MSI controller may feature a number of doorbells. 22 MSI controllers may have restrictions on permitted payloads. 28 MSI controller and device rather than a property of either in isolation). 31 MSI controllers: 34 An MSI controller signals interrupts to a CPU when a write is made to an MMIO 35 address by some master. An MSI controller may feature a number of doorbells. 40 - msi-controller: Identifies the node as an MSI controller. 51 the specific MSI controller. [all …]
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| /linux/Documentation/PCI/endpoint/ |
| H A D | pci-ntb-function.rst | 115 MSI/MSI-X vectors (i.e., initialize the MSI/MSI-X Capability in the 118 to the MSI/MSI-X address programmed by the host. The ARGUMENT 120 lower 16 bits) and if MSI or MSI-X should be configured (BIT 16). 178 in order to raise doorbell. EPF NTB can use either MSI or MSI-X to 179 ring doorbell (MSI-X support will be added later). MSI uses same 180 address for all the interrupts and MSI-X can provide different 181 addresses for different interrupts. The MSI/MSI-X address is provided 182 by the host and the address it gives is based on the MSI/MSI-X 184 using GIC ITS will have the same MSI-X address for all the interrupts. 186 for both MSI and MSI-X, EPF NTB allocates a separate region in the [all …]
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| H A D | pci-test-function.rst | 45 Bit 1 raise MSI IRQ 46 Bit 2 raise MSI-X IRQ 82 This register contains the interrupt type (Legacy/MSI) triggered 83 for the READ/WRITE/COPY and raise IRQ (Legacy/MSI) commands. 89 MSI 1 90 MSI-X 2 101 MSI [1 .. 32] 102 MSI-X [1 .. 2048]
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| /linux/Documentation/translations/zh_TW/arch/loongarch/ |
| H A D | irq-chip-model.rst | 16 斷控制器)、PCH-LPC(LS7A芯片組的LPC中斷控制器)和PCH-MSI(MSI中斷控制器)。 19 全局中斷控制器(每個芯片一個,所有核共享),而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中 28 PCH-LPC/PCH-MSI,然後被HTVECINTC統一收集,再發送到LIOINTC,最後到達CPUINTC:: 46 | PCH-PIC | | PCH-MSI | 64 PCH-LPC/PCH-MSI,然後被EIOINTC統一收集,再直接到達CPUINTC:: 77 | PCH-PIC | | PCH-MSI | 123 PCH-MSI:: 156 - PCH-PIC/PCH-MSI:即《龍芯7A1000橋片用戶手冊》第5章所描述的“中斷控制器”;
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| /linux/Documentation/misc-devices/ |
| H A D | pci-endpoint-test.rst | 17 #) raise MSI IRQ 18 #) raise MSI-X IRQ 36 Tests message signalled interrupts. The MSI number 39 Tests message signalled interrupts. The MSI-X number 43 should be passed as argument (0: Legacy, 1:MSI, 2:MSI-X).
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| H A D | spear-pcie-gadget.rst | 42 no_of_msi zero if MSI is not enabled by host. A positive value is the 43 number of MSI vector granted. 58 INTA, MSI or NO_INT). Select MSI only when you have programmed 60 no_of_msi number of MSI vector needed. 62 send_msi write MSI vector to be sent. 142 if MSI is to be used as interrupt, program no of msi vector needed (say4):: 146 select MSI as interrupt type:: 148 # echo MSI >> int_type 165 Should return 4 (number of requested MSI vector)
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| /linux/Documentation/translations/zh_CN/PCI/ |
| H A D | pciebus-howto.rst | 166 MSI 和 MSI-X 向量资源 169 一旦设备上的MSI或MSI-X中断被启用,它就会一直保持这种模式,直到它们再次被禁用。由于同 171 禁用MSI/MSI-X模式,可能会导致不可预知的行为。
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| /linux/drivers/ntb/ |
| H A D | Kconfig | 17 bool "MSI Interrupt Support" 20 Support using MSI interrupt forwarding instead of (or in addition to) 21 hardware doorbells. MSI interrupts typically offer lower latency 22 than doorbells and more MSI interrupts can be made available to 24 in the hardware driver for creating the MSI interrupts.
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| /linux/Documentation/devicetree/bindings/powerpc/4xx/ |
| H A D | hsta.txt | 10 Currently only the MSI support is used by Linux using the following 15 - reg : register mapping for the HSTA MSI space 16 - interrupts : ordered interrupt mapping for each MSI in the register
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| /linux/Documentation/networking/device_drivers/ethernet/neterion/ |
| H A D | s2io.rst | 22 such as jumbo frames, MSI/MSI-X, checksum offloads, TSO, UFO and so on. 46 driver version, interface name(eth3, eth4), Interrupt type(INTA, MSI, MSI-X). 66 d. MSI/MSI-X. Can be enabled on platforms which support this feature 108 Specifies interrupt type. Possible values 0(INTA), 2(MSI-X)
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| /linux/drivers/ntb/test/ |
| H A D | Kconfig | 31 tristate "NTB MSI Test Client" 34 This tool demonstrates the use of the NTB MSI library to 35 send MSI interrupts between peers.
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| /linux/Documentation/ABI/testing/ |
| H A D | configfs-spear-pcie-gadget | 22 no_of_msi used to configure number of MSI vector needed and 23 to read no of MSI granted. 25 send_msi write MSI vector to be sent.
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| H A D | sysfs-driver-pciback | 23 MSI, MSI-X) set by a connected guest. It is meant to be set
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| /linux/Documentation/PCI/ |
| H A D | pci.rst | 320 With MSI and MSI-X (more below) the interrupt number is a CPU "vector". 326 MSI and MSI-X are PCI capabilities. Both are "Message Signaled Interrupts" 328 The fundamental difference between MSI and MSI-X is how multiple 329 "vectors" get allocated. MSI requires contiguous blocks of vectors 330 while MSI-X can allocate several individual ones. 332 MSI capability can be enabled by calling pci_alloc_irq_vectors() with the 336 support MSI or MSI-X and a call to pci_alloc_irq_vectors with just 340 Drivers that have different interrupt handlers for MSI/MSI-X and 345 There are (at least) two really good reasons for using MSI: 347 1) MSI is an exclusive interrupt vector by definition. [all …]
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| H A D | boot-interrupts.rst | 12 On PCI Express, interrupts are represented with either MSI or inbound 15 MSI interrupts. If the IO-APIC is disabled (via the mask bits in the 81 PCIe Root Ports will use native MSI/MSI-X mechanisms. 105 PCH - they are either converted into MSI via the integrated IO-APIC
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| /linux/drivers/media/pci/ddbridge/ |
| H A D | Kconfig | 35 bool "Enable Message Signaled Interrupts (MSI) per default (EXPERIMENTAL)" 39 Use PCI MSI (Message Signaled Interrupts) per default. Enabling this 42 module. MSI can still be disabled by passing msi=0 as option, as
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| /linux/Documentation/admin-guide/media/ |
| H A D | dvb-usb-m920x-cardlist.rst | 21 * - MSI DIGI VOX mini II DVB-T USB2.0 23 * - MSI Mega Sky 580 DVB-T USB2.0
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| H A D | dvb-usb-af9015-cardlist.rst | 57 * - MSI DIGIVOX Duo 59 * - MSI Digi VOX mini III
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| H A D | saa7134-cardlist.rst | 238 - LifeView FlyDVB-T DUO / MSI TV@nywhere Duo 346 - MSI TV@Anywhere plus 394 - LifeView FlyDVB-T Hybrid Cardbus/MSI TV @nywhere A/D NB 558 - MSI TV@nywhere A/D v1.1
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| /linux/Documentation/PCI/endpoint/function/binding/ |
| H A D | pci-test.rst | 22 msi_interrupts Should be 1 to 32 depending on the number of MSI interrupts 24 msix_interrupts Should be 1 to 2048 depending on the number of MSI-X
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| /linux/drivers/pci/endpoint/ |
| H A D | Kconfig | 32 bool "PCI Endpoint MSI Doorbell Support" 35 This enables the EP's MSI interrupt controller to function as a
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| /linux/Documentation/wmi/devices/ |
| H A D | msi-wmi-platform.rst | 4 MSI WMI Platform Features driver (msi-wmi-platform) 10 Many MSI notebooks support various features like reading fan sensors. This features are controlled 157 The MSI software seems to only use this interface when the last bit is set. 179 The MSI software seems to only use this interface when the major version is greater than two. 181 Reverse-Engineering the MSI WMI Platform interface 195 More information about the MSI embedded controller interface can be found at the
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| /linux/arch/sparc/kernel/ |
| H A D | pci_fire.c | 131 #define MSI_MAP(MSI) (0x020000UL + (MSI) * 0x8UL) argument 136 #define MSI_CLEAR(MSI) (0x028000UL + (MSI) * 0x8UL) argument
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| /linux/Documentation/virt/hyperv/ |
| H A D | vpci.rst | 165 MSI, multi-MSI, or MSI-X. Assigning the guest vCPU that will 166 receive the interrupt for a particular MSI or MSI-X message is 168 the Hyper-V interfaces. For the single-MSI and MSI-X cases, 202 MSI/MSI-X interrupt, and the x86 interrupt vector number that 206 for each MSI/MSI-X interrupt. The Hyper-V virtual PCI driver
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| /linux/Documentation/nvme/ |
| H A D | nvme-pci-endpoint-target.rst | 96 1) One memory window for raising MSI or MSI-X interrupts 120 the number of MSI-X or MSI vectors available. 266 If the PCI endpoint controller used does not support MSI-X, MSI can be 292 nvmet_pci_epf nvmet_pci_epf.0: PCI endpoint controller supports MSI-X, 32 vectors 357 interrupt_pin Interrupt PIN to use if MSI and MSI-X are not supported
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