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Searched refs:MSC01_IC_GENA (Results 1 – 2 of 2) sorted by relevance

/linux/arch/mips/include/asm/
H A Dmsc01_ic.h116 #define MSC01_IC_GENA (MSC01_IC_REG_BASE + MSC01_IC_GENA_OFS) macro
/linux/arch/mips/kernel/
H A Dirq-msc01.c154 MSCIC_WRITE(MSC01_IC_GENA, MSC01_IC_GENA_GENA_BIT); /* Enable interrupt generation */ in init_msc_irqs()