Searched refs:MRVL_XSPI_CLK_ENABLE (Results 1 – 1 of 1) sorted by relevance
252 #define MRVL_XSPI_CLK_ENABLE BIT(0) macro451 clk_reg &= ~MRVL_XSPI_CLK_ENABLE; in cdns_mrvl_xspi_setup_clock()457 clk_reg |= MRVL_XSPI_CLK_ENABLE; in cdns_mrvl_xspi_setup_clock()