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Searched refs:MPLL_CONTROL__SPARE_DQ_0_0_MASK (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h11356 #define MPLL_CONTROL__SPARE_DQ_0_0_MASK 0x00080000L macro
H A Dgmc_7_1_sh_mask.h9567 #define MPLL_CONTROL__SPARE_DQ_0_0_MASK 0x80000 macro
H A Dgmc_8_1_sh_mask.h10481 #define MPLL_CONTROL__SPARE_DQ_0_0_MASK 0x80000 macro