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Searched refs:MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h41996 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h17189 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h43933 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h43954 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h24813 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h22828 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h25569 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h57685 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h49137 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h56388 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h17213 #define MPCC_OGAM3_MPCC_OGAM_CONTROL__MPCC_OGAM_MODE__SHIFT … macro