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Searched refs:MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h24844 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h40927 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h16116 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h43046 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h43067 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h23740 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h21755 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h24496 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h56612 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h48064 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h55315 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h16140 #define MPCC_OGAM1_MPCC_OGAM_CONTROL__MPCC_OGAM_SELECT__SHIFT … macro