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Searched refs:MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h10963 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h24297 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_1_0_sh_mask.h18977 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h40214 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h15195 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h20349 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h42464 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h42485 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h22688 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h20703 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h23444 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h55899 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h47268 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h23417 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h54437 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h15219 #define MPCC1_MPCC_STATUS__MPCC_BUSY__SHIFT … macro