Home
last modified time | relevance | path

Searched refs:MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h10868 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h24213 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_1_0_sh_mask.h18873 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h40130 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h15106 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h20252 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h42397 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h42418 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h22604 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h20619 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h23360 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h55815 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h47184 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h23320 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h54353 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h15130 #define MPCC0_MPCC_STATUS__MPCC_IDLE__SHIFT … macro