Searched refs:MMU_MMU_CONTROL1_OFFSET (Results 1 – 2 of 2) sorted by relevance
56 write_reg_field(mmu_base, MMU_MMU_CONTROL1_OFFSET, in e5010_reset()60 ret = readl_poll_timeout_atomic(mmu_base + MMU_MMU_CONTROL1_OFFSET, val, in e5010_reset()
62 #define MMU_MMU_CONTROL1_OFFSET (0x0008) macro