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Searched refs:MMSCH_V3_0_INSERT_DIRECT_WT (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v3_0.c1381 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v3_0_start_sriov()
1384 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v3_0_start_sriov()
1388 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v3_0_start_sriov()
1392 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v3_0_start_sriov()
1395 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v3_0_start_sriov()
1399 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v3_0_start_sriov()
1404 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v3_0_start_sriov()
1409 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v3_0_start_sriov()
1412 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v3_0_start_sriov()
1415 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v3_0_start_sriov()
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H A Dmmsch_v3_0.h103 #define MMSCH_V3_0_INSERT_DIRECT_WT(reg, value) { \ macro