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Searched refs:MMEA1_IO_WR_PRI_URGENCY_MASKING__CID0_MASK__SHIFT (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_8_0_sh_mask.h12017 #define MMEA1_IO_WR_PRI_URGENCY_MASKING__CID0_MASK__SHIFT … macro
H A Dmmhub_1_7_sh_mask.h15885 #define MMEA1_IO_WR_PRI_URGENCY_MASKING__CID0_MASK__SHIFT … macro