Home
last modified time | relevance | path

Searched refs:MMC_TIMING_MMC_DDR52 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/mmc/host/
H A Ddw_mmc-rockchip.c200 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
263 case MMC_TIMING_MMC_DDR52: in dw_mci_rk3288_set_ios()
H A Dsdhci-xenon-phy.c651 case MMC_TIMING_MMC_DDR52: in xenon_emmc_phy_set()
783 case MMC_TIMING_MMC_DDR52: in xenon_hs_delay_adj()
H A Dsdhci-pci-arasan.c283 case MMC_TIMING_MMC_DDR52: in arasan_select_phy_clock()
H A Dsunxi-mmc.c741 ios->timing != MMC_TIMING_MMC_DDR52) { in sunxi_mmc_clk_set_phase()
786 if (ios->timing == MMC_TIMING_MMC_DDR52 && in sunxi_mmc_clk_set_rate()
891 ios->timing == MMC_TIMING_MMC_DDR52) in sunxi_mmc_set_clk()
H A Dsdhci_am654.c131 [MMC_TIMING_MMC_DDR52] = {"ti,otap-del-sel-ddr52",
758 if (i <= MMC_TIMING_MMC_DDR52) in sdhci_am654_get_otap_delay()
H A Drtsx_pci_sdmmc.c1034 case MMC_TIMING_MMC_DDR52: in sd_set_timing()
1115 case MMC_TIMING_MMC_DDR52: in sdmmc_set_ios()
H A Dmmci_stm32_sdmmc.c302 if (host->mmc->ios.timing == MMC_TIMING_MMC_DDR52 || in mmci_sdmmc_set_clkreg()
H A Dsunplus-mmc.c272 case MMC_TIMING_MMC_DDR52: in spmmc_set_bus_timing()
H A Dmmci.c493 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_set_clkreg()
1284 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_start_data()
H A Dsh_mmcif.c886 case MMC_TIMING_MMC_DDR52: in sh_mmcif_set_cmd()
/linux/include/linux/mmc/
H A Dhost.h63 #define MMC_TIMING_MMC_DDR52 8 macro
/linux/drivers/mmc/core/
H A Dhost.c248 &map->phase[MMC_TIMING_MMC_DDR52]); in mmc_of_parse_clk_phase()
H A Dmmc.c1131 MMC_TIMING_MMC_DDR52, in mmc_select_hs_ddr()
1303 mmc_set_timing(host, MMC_TIMING_MMC_DDR52); in mmc_hs400_to_hs200()