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Searched refs:MLX5_CAP_ETH (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dvxlan.h42 return MLX5_CAP_ETH(mdev, max_vxlan_udp_ports) ?: 4; in mlx5_vxlan_max_udp_ports()
H A Dvxlan.c151 if (!MLX5_CAP_ETH(mdev, tunnel_stateless_vxlan) || !mlx5_core_is_pf(mdev)) in mlx5_vxlan_create()
H A Dfs_ttc.c268 return MLX5_CAP_ETH(mdev, tunnel_stateless_gre); in mlx5_tunnel_proto_supported_rx()
271 return (MLX5_CAP_ETH(mdev, tunnel_stateless_ip_over_ip) || in mlx5_tunnel_proto_supported_rx()
272 MLX5_CAP_ETH(mdev, tunnel_stateless_ip_over_ip_rx)); in mlx5_tunnel_proto_supported_rx()
/linux/drivers/net/ethernet/mellanox/mlx5/core/en/
H A Dtc_tun_mplsoudp.c66 if (!MLX5_CAP_ETH(priv->mdev, tunnel_stateless_mpls_over_udp) && in parse_tunnel()
H A Dparams.c1138 if (MLX5_CAP_ETH(mdev, lro_timer_supported_periods[i]) >= wanted_timeout) in mlx5e_choose_lro_timeout()
1141 return MLX5_CAP_ETH(mdev, lro_timer_supported_periods[i]); in mlx5e_choose_lro_timeout()
1262 MLX5_SET(sqc, sqc, reg_umr, MLX5_CAP_ETH(mdev, reg_umr_sq)); in mlx5e_build_icosq_param()
1278 MLX5_SET(sqc, sqc, reg_umr, MLX5_CAP_ETH(mdev, reg_umr_sq)); in mlx5e_build_async_icosq_param()
/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Den.h1193 return MLX5_CAP_ETH(mdev, swp) && in mlx5_tx_swp_supported()
1194 MLX5_CAP_ETH(mdev, swp_csum) && MLX5_CAP_ETH(mdev, swp_lso); in mlx5_tx_swp_supported()
1272 MLX5_CAP_ETH(mdev, enhanced_multi_pkt_send_wqe); in mlx5e_tx_mpwqe_supported()
H A Den_main.c111 MLX5_CAP_ETH(mdev, reg_umr_sq); in mlx5e_check_fragmented_striding_rq_cap()
1406 if (MLX5_CAP_ETH(mdev, cqe_checksum_full)) in mlx5e_open_rq()
1792 if (MLX5_CAP_ETH(mdev, wqe_inline_mode) == MLX5_CAP_INLINE_MODE_VPORT_CONTEXT) in mlx5e_create_sq()
5056 return MLX5_CAP_ETH(mdev, tunnel_stateless_gre); in mlx5e_tunnel_proto_supported_tx()
5059 return (MLX5_CAP_ETH(mdev, tunnel_stateless_ip_over_ip) || in mlx5e_tunnel_proto_supported_tx()
5060 MLX5_CAP_ETH(mdev, tunnel_stateless_ip_over_ip_tx)); in mlx5e_tunnel_proto_supported_tx()
5076 return MLX5_CAP_ETH(mdev, tunnel_stateless_mpls_over_gre); in mlx5e_gre_tunnel_inner_proto_offload_supported()
5875 if (!!MLX5_CAP_ETH(mdev, lro_cap) && in mlx5e_build_nic_netdev()
5876 !MLX5_CAP_ETH(mdev, tunnel_lro_vxlan) && in mlx5e_build_nic_netdev()
5877 !MLX5_CAP_ETH(mdev, tunnel_lro_gre) && in mlx5e_build_nic_netdev()
[all …]
/linux/drivers/net/ethernet/mellanox/mlx5/core/en_accel/
H A Dpsp.c1069 if (!MLX5_CAP_ETH(mdev, swp)) { in mlx5e_psp_init()
1074 if (!MLX5_CAP_ETH(mdev, swp_csum)) { in mlx5e_psp_init()
1079 if (!MLX5_CAP_ETH(mdev, swp_csum_l4_partial)) { in mlx5e_psp_init()
1084 if (!MLX5_CAP_ETH(mdev, swp_lso)) { in mlx5e_psp_init()
H A Dipsec_offload.c42 MLX5_CAP_ETH(mdev, insert_trailer) && MLX5_CAP_ETH(mdev, swp)) in mlx5_ipsec_device_caps()
H A Dipsec.c1347 if (!MLX5_CAP_ETH(mdev, swp_csum)) { in mlx5e_ipsec_build_netdev()
1355 if (!MLX5_CAP_ETH(mdev, swp_lso)) { in mlx5e_ipsec_build_netdev()
/linux/include/linux/mlx5/
H A Ddevice.h1315 #define MLX5_CAP_ETH(mdev, cap) \ macro