Searched refs:MIPI_RX_ANA00_CSIXA (Results 1 – 2 of 2) sorted by relevance
/linux/drivers/phy/mediatek/ |
H A D | phy-mtk-mipi-csi-0-5.c | 84 mtk_phy_update_field(base + MIPI_RX_ANA00_CSIXA, RG_CSI0A_CPHY_EN, 0); in mtk_mipi_phy_power_on() 85 mtk_phy_update_field(base + CSIXB_OFFSET + MIPI_RX_ANA00_CSIXA, in mtk_mipi_phy_power_on() 100 mtk_phy_update_field(base + MIPI_RX_ANA00_CSIXA, RG_CSIXA_DPHY_L0_CKMODE_EN, 0); in mtk_mipi_phy_power_on() 101 mtk_phy_update_field(base + MIPI_RX_ANA00_CSIXA, RG_CSIXA_DPHY_L0_CKSEL, 1); in mtk_mipi_phy_power_on() 102 mtk_phy_update_field(base + MIPI_RX_ANA00_CSIXA, RG_CSIXA_DPHY_L1_CKMODE_EN, 0); in mtk_mipi_phy_power_on() 103 mtk_phy_update_field(base + MIPI_RX_ANA00_CSIXA, RG_CSIXA_DPHY_L1_CKSEL, 1); in mtk_mipi_phy_power_on() 104 mtk_phy_update_field(base + MIPI_RX_ANA00_CSIXA, RG_CSIXA_DPHY_L2_CKMODE_EN, 1); in mtk_mipi_phy_power_on() 105 mtk_phy_update_field(base + MIPI_RX_ANA00_CSIXA, RG_CSIXA_DPHY_L2_CKSEL, 1); in mtk_mipi_phy_power_on() 107 mtk_phy_update_field(base + CSIXB_OFFSET + MIPI_RX_ANA00_CSIXA, in mtk_mipi_phy_power_on() 109 mtk_phy_update_field(base + CSIXB_OFFSET + MIPI_RX_ANA00_CSIXA, RG_CSIXA_DPHY_L0_CKSEL, 1); in mtk_mipi_phy_power_on() [all …]
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H A D | phy-mtk-mipi-csi-0-5-rx-reg.h | 17 #define MIPI_RX_ANA00_CSIXA 0x0000 macro
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