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Searched refs:MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7774 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x00000010 macro
H A Ddce_8_0_sh_mask.h1570 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 macro
H A Ddce_11_0_sh_mask.h1554 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h1606 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 macro
H A Ddce_11_2_sh_mask.h1716 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10 macro
H A Ddce_12_0_sh_mask.h2731 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h208 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT … macro
H A Ddcn_1_0_sh_mask.h2093 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h924 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h538 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h6480 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h6501 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h656 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT … macro
H A Ddcn_4_1_0_sh_mask.h406 #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT … macro