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Searched refs:MC_SEQ_TCG_CNTL__ENABLE_D1__SHIFT (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_sh_mask.h8833 #define MC_SEQ_TCG_CNTL__ENABLE_D1__SHIFT 0x00000002 macro
H A Dgmc_7_1_sh_mask.h9154 #define MC_SEQ_TCG_CNTL__ENABLE_D1__SHIFT 0x2 macro
H A Dgmc_8_1_sh_mask.h10066 #define MC_SEQ_TCG_CNTL__ENABLE_D1__SHIFT 0x2 macro