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Searched refs:MC_CG_CONFIG_MCD__MCD5_WR_ENABLE_MASK (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_sh_mask.h3049 #define MC_CG_CONFIG_MCD__MCD5_WR_ENABLE_MASK 0x20 macro
H A Dgmc_8_2_sh_mask.h3933 #define MC_CG_CONFIG_MCD__MCD5_WR_ENABLE_MASK 0x20 macro
H A Dgmc_6_0_sh_mask.h1366 #define MC_CG_CONFIG_MCD__MCD5_WR_ENABLE_MASK 0x00000020L macro
H A Dgmc_7_1_sh_mask.h3679 #define MC_CG_CONFIG_MCD__MCD5_WR_ENABLE_MASK 0x20 macro
H A Dgmc_8_1_sh_mask.h4091 #define MC_CG_CONFIG_MCD__MCD5_WR_ENABLE_MASK 0x20 macro