Searched refs:MAX_SURFACES (Results 1 – 5 of 5) sorted by relevance
481 } else if (stream_status->plane_count == MAX_SURFACES) { in dc_state_add_plane()483 plane_state, MAX_SURFACES); in dc_state_add_plane()598 struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 }; in dc_state_rem_all_planes_for_stream()877 struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 }; in dc_state_rem_all_phantom_planes_for_stream()
3595 struct dc_plane_state *new_planes[MAX_SURFACES] = {0}; in update_planes_and_stream_state()4856 struct dc_surface_update srf_updates[MAX_SURFACES] = {0}; in commit_minimal_transition_based_on_current_context()5221 struct dc_fast_update fast_update[MAX_SURFACES] = {0}; in update_planes_and_stream_v2()5307 struct dc_fast_update fast_update[MAX_SURFACES] = {0}; in commit_planes_and_stream_update_on_current_context()7208 struct dc_surface_update intermediate_updates[MAX_SURFACES];7301 struct dc_fast_update fast_update[MAX_SURFACES] = { 0 }; in update_planes_and_stream_prepare_v3()
61 struct dc_plane_state *plane_states[MAX_SURFACES];
71 #define MAX_SURFACES 4 macro1575 struct dc_plane_state plane_states[MAX_SURFACES];1933 struct dc_plane_state *plane_states[MAX_SURFACES];
3356 struct dc_surface_update surface_updates[MAX_SURFACES]; in dm_gpureset_commit_state()3357 struct dc_plane_info plane_infos[MAX_SURFACES]; in dm_gpureset_commit_state()3358 struct dc_scaling_info scaling_infos[MAX_SURFACES]; in dm_gpureset_commit_state()3359 struct dc_flip_addrs flip_addrs[MAX_SURFACES]; in dm_gpureset_commit_state()9942 struct dc_surface_update surface_updates[MAX_SURFACES]; in amdgpu_dm_commit_planes()9943 struct dc_plane_info plane_infos[MAX_SURFACES]; in amdgpu_dm_commit_planes()9944 struct dc_scaling_info scaling_infos[MAX_SURFACES]; in amdgpu_dm_commit_planes()9945 struct dc_flip_addrs flip_addrs[MAX_SURFACES]; in amdgpu_dm_commit_planes()10977 dummy_updates = kzalloc(sizeof(struct dc_surface_update) * MAX_SURFACES, GFP_KERNEL); in amdgpu_dm_atomic_commit_tail()