Searched refs:MAX_NUM_DPM_LVL (Results 1 – 13 of 13) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr.h | 100 #define MAX_NUM_DPM_LVL 8 macro
132 struct clk_limit_table_entry entries[MAX_NUM_DPM_LVL];
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| H A D | dcn302_fpu.c | 223 for (i = 0; i < MAX_NUM_DPM_LVL; i++) { in dcn302_fpu_update_bw_bounding_box()
312 if (num_states > MAX_NUM_DPM_LVL) { in dcn302_fpu_update_bw_bounding_box()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| H A D | dcn303_fpu.c | 219 for (i = 0; i < MAX_NUM_DPM_LVL; i++) { in dcn303_fpu_update_bw_bounding_box()
318 if (num_states > MAX_NUM_DPM_LVL) { in dcn303_fpu_update_bw_bounding_box()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| H A D | dml21_translation_helper.c | 109 for (i = 0; i < min(DML_MAX_CLK_TABLE_SIZE, MAX_NUM_DPM_LVL); i++) { in dml21_apply_soc_bb_overrides()
132 for (i = 0; i < min(DML_MAX_CLK_TABLE_SIZE, MAX_NUM_DPM_LVL); i++) { in dml21_apply_soc_bb_overrides()
155 for (i = 0; i < min(DML_MAX_CLK_TABLE_SIZE, MAX_NUM_DPM_LVL); i++) { in dml21_apply_soc_bb_overrides()
178 for (i = 0; i < min(DML_MAX_CLK_TABLE_SIZE, MAX_NUM_DPM_LVL); i++) { in dml21_apply_soc_bb_overrides()
201 for (i = 0; i < min(DML_MAX_CLK_TABLE_SIZE, MAX_NUM_DPM_LVL); i++) { in dml21_apply_soc_bb_overrides()
224 for (i = 0; i < min(DML_MAX_CLK_TABLE_SIZE, MAX_NUM_DPM_LVL); i++) { in dml21_apply_soc_bb_overrides()
247 for (i = 0; i < min(DML_MAX_CLK_TABLE_SIZE, MAX_NUM_DPM_LVL); i++) { in dml21_apply_soc_bb_overrides()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
| H A D | dcn321_fpu.c | 364 for (i = 0; i < MAX_NUM_DPM_LVL; i++) { in build_synthetic_soc_states()
721 for (i = 0; i < MAX_NUM_DPM_LVL; i++) { in dcn321_update_bw_bounding_box_fpu()
811 if (num_states > MAX_NUM_DPM_LVL) { in dcn321_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 685 if (i > MAX_NUM_DPM_LVL - 1) in dcn314_clk_mgr_helper_populate_bw_params()
686 i = MAX_NUM_DPM_LVL - 1; in dcn314_clk_mgr_helper_populate_bw_params()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 869 if (i > MAX_NUM_DPM_LVL - 1) in dcn35_clk_mgr_helper_populate_bw_params()
870 i = MAX_NUM_DPM_LVL - 1; in dcn35_clk_mgr_helper_populate_bw_params()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_clk_mgr.c | 488 static_assert(NUM_DF_PSTATE_LEVELS <= MAX_NUM_DPM_LVL, in dcn316_clk_mgr_helper_populate_bw_params()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| H A D | vg_clk_mgr.c | 569 static_assert(VG_NUM_FCLK_DPM_LEVELS <= MAX_NUM_DPM_LVL, in vg_clk_mgr_helper_populate_bw_params()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | rn_clk_mgr.c | 646 static_assert(PP_SMU_NUM_FCLK_DPM_LEVELS <= MAX_NUM_DPM_LVL, in rn_clk_mgr_helper_populate_bw_params()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.c | 565 static_assert(NUM_DF_PSTATE_LEVELS <= MAX_NUM_DPM_LVL, in dcn31_clk_mgr_helper_populate_bw_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 2670 for (i = 0; i < MAX_NUM_DPM_LVL; i++) { in dcn32_patch_dpm_table()
2816 for (i = 0; i < MAX_NUM_DPM_LVL; i++) { in build_synthetic_soc_states()
3160 for (i = 0; i < MAX_NUM_DPM_LVL; i++) { in dcn32_update_bw_bounding_box_fpu()
3255 if (num_states > MAX_NUM_DPM_LVL) { in dcn32_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 2127 for (i = 0; i < MAX_NUM_DPM_LVL; i++) { in dcn30_update_bw_bounding_box()
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