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Searched refs:MAX_CHANNELS_PER_ENC (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_encoder.c57 #define MAX_CHANNELS_PER_ENC 2 macro
181 struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC];
182 struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC];
708 struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC]; in dpu_encoder_assign_crtc_resources()
709 struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC]; in dpu_encoder_assign_crtc_resources()
710 struct dpu_hw_blk *hw_dspp[MAX_CHANNELS_PER_ENC]; in dpu_encoder_assign_crtc_resources()
1219 struct dpu_hw_blk *hw_pp[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set()
1220 struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set()
1221 struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set()
1252 for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) in dpu_encoder_virt_atomic_mode_set()
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