Searched refs:MASK_06 (Results 1 – 4 of 4) sorted by relevance
341 saa7146_write(dev, MC2, (MASK_05 | MASK_06 | MASK_21 | MASK_22) ); in saa7146_set_window()656 WRITE_RPS0(MASK_06 | MASK_22); /* => mask */ in program_capture_engine()657 WRITE_RPS0(MASK_06 | MASK_22); /* => values */ in program_capture_engine()684 WRITE_RPS0(MASK_22 | MASK_06); /* => mask */ in program_capture_engine()
288 saa7146_write(dev, MC2, MASK_22 | MASK_06); in saa7146_s_ctrl()296 saa7146_write(dev, MC2, MASK_22 | MASK_06); in saa7146_s_ctrl()304 saa7146_write(dev, MC2, MASK_22 | MASK_06); in saa7146_s_ctrl()
243 #define MASK_06 0x00000040 /* Mask value for bit 6 */ macro
277 if (saa7146_read(saa, PSR) & MASK_06) { in ciintf_poll_slot_status()