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Searched refs:LPSC (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/davinci/
H A Dpsc-da830.c23 LPSC(0, 0, tpcc, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
24 LPSC(1, 0, tptc0, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
25 LPSC(2, 0, tptc1, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
26 LPSC(3, 0, aemif, pll0_sysclk3, aemif_clkdev, LPSC_ALWAYS_ENABLED),
27 LPSC(4, 0, spi0, pll0_sysclk2, spi0_clkdev, 0),
28 LPSC(5, 0, mmcsd, pll0_sysclk2, mmcsd_clkdev, 0),
29 LPSC(6, 0, aintc, pll0_sysclk4, NULL, LPSC_ALWAYS_ENABLED),
30 LPSC(7, 0, arm_rom, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
31 LPSC(8, 0, secu_mgr, pll0_sysclk4, NULL, LPSC_ALWAYS_ENABLED),
32 LPSC(9, 0, uart0, pll0_sysclk2, uart0_clkdev, 0),
[all …]
H A Dpsc-da850.c28 LPSC(0, 0, tpcc0, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
29 LPSC(1, 0, tptc0, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
30 LPSC(2, 0, tptc1, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
31 LPSC(3, 0, emifa, async1, emifa_clkdev, 0),
32 LPSC(4, 0, spi0, pll0_sysclk2, spi0_clkdev, 0),
33 LPSC(5, 0, mmcsd0, pll0_sysclk2, mmcsd0_clkdev, 0),
34 LPSC(6, 0, aintc, pll0_sysclk4, NULL, LPSC_ALWAYS_ENABLED),
35 LPSC(7, 0, arm_rom, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
36 LPSC(9, 0, uart0, pll0_sysclk2, uart0_clkdev, 0),
37 LPSC(13, 0, pruss, pll0_sysclk2, NULL, 0),
[all …]
H A Dpsc.h69 #define LPSC(m, d, n, p, c, f) \ macro
/linux/Documentation/devicetree/bindings/clock/ti/davinci/
H A Dpsc.txt26 module ID (LPSC) as the index corresponding to the clock cell. Refer to