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Searched refs:L1CSR0_DCE (Results 1 – 2 of 2) sorted by relevance

/linux/arch/powerpc/kernel/
H A Dcpu_setup_e500.S33 andi. r3, r0, L1CSR0_DCE
48 ori r0, r0, L1CSR0_DCE
/linux/arch/powerpc/include/asm/
H A Dreg_booke.h476 #define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ macro