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Searched refs:JH7100_CLK_VDEC_BUS (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7100.c104 JH71X0__DIV(JH7100_CLK_VDEC_BUS, "vdec_bus", 8, JH7100_CLK_VCDECBUS_SRC),
105 JH71X0_GATE(JH7100_CLK_VDEC_AXI, "vdec_axi", 0, JH7100_CLK_VDEC_BUS),
106 JH71X0_GATE(JH7100_CLK_VDECBRG_MAIN, "vdecbrg_mainclk", 0, JH7100_CLK_VDEC_BUS),
/linux/include/dt-bindings/clock/
H A Dstarfive-jh7100.h51 #define JH7100_CLK_VDEC_BUS 42 macro