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Searched refs:JH7100_CLK_PLL1_OUT (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7100.c30 JH7100_CLK_PLL1_OUT,
34 JH7100_CLK_PLL1_OUT,
39 JH7100_CLK_PLL1_OUT,
53 JH7100_CLK_PLL1_OUT,
62 JH7100_CLK_PLL1_OUT,
67 JH7100_CLK_PLL1_OUT),
124 JH71X0_GDIV(JH7100_CLK_DDRPLL_DIV2, "ddrpll_div2", CLK_IS_CRITICAL, 2, JH7100_CLK_PLL1_OUT),
/linux/include/dt-bindings/clock/
H A Dstarfive-jh7100.h197 #define JH7100_CLK_PLL1_OUT 187 macro