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Searched refs:JH7100_CLK_PLL0_OUT (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7100.c29 JH7100_CLK_PLL0_OUT,
38 JH7100_CLK_PLL0_OUT,
43 JH7100_CLK_PLL0_OUT,
47 JH7100_CLK_PLL0_OUT),
57 JH7100_CLK_PLL0_OUT,
59 JH71X0_GDIV(JH7100_CLK_AUDIO_ROOT, "audio_root", 0, 8, JH7100_CLK_PLL0_OUT),
66 JH7100_CLK_PLL0_OUT,
70 JH7100_CLK_PLL0_OUT,
275 if (idx < JH7100_CLK_PLL0_OUT) in jh7100_clk_get()
279 return priv->pll[idx - JH7100_CLK_PLL0_OUT]; in jh7100_clk_get()
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/linux/include/dt-bindings/clock/
H A Dstarfive-jh7100.h196 #define JH7100_CLK_PLL0_OUT 186 macro