Searched refs:JBT_REG_ASW_TIMING_2 (Results 1 – 2 of 2) sorted by relevance
76 #define JBT_REG_ASW_TIMING_2 0xd5 macro237 jbt_reg_write_1(lcd, JBT_REG_ASW_TIMING_2, 0x0e, &ret); in td028ttec1_prepare()
149 JBT_REG_ASW_TIMING_2 = 0xd5, enumerator283 r |= jbt_reg_write_1(ddata, JBT_REG_ASW_TIMING_2, 0x0e); in td028ttec1_panel_enable()