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Searched refs:Interlace (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h482 bool Interlace,
618 bool Interlace[],
1014 bool Interlace[],
H A Ddisplay_mode_vba_32.c437 …ermarksAndPerformanceCalculation.SurfaceParameters[k].InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
696 v->MaxVStartupLines[k] = ((mode_lib->vba.Interlace[k] && in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
774 …hParametersWatermarksAndPerformanceCalculation.myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1439 isInterlaceTiming = (mode_lib->vba.Interlace[k] && in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1533 mode_lib->vba.Interlace, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1597 mode_lib->vba.Interlace, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2357 == dm_420 && mode_lib->vba.Interlace[k] == 1 && in dml32_ModeSupportAndSystemConfigurationFull()
2730 …deSupportAndSystemConfigurationFull.SurfParameters[k].InterlaceEnable = mode_lib->vba.Interlace[k]; in dml32_ModeSupportAndSystemConfigurationFull()
2962 mode_lib->vba.MaximumVStartup[i][j][k] = ((mode_lib->vba.Interlace[k] && in dml32_ModeSupportAndSystemConfigurationFull()
3083 mode_lib->vba.Interlace, in dml32_ModeSupportAndSystemConfigurationFull()
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_utils.c45 dml_timing_array->Interlace[dst_index] = dml_timing_array->Interlace[src_index]; in dml2_util_copy_dml_timing()
H A Ddisplay_mode_core_structs.h612 dml_bool_t Interlace[__DML_NUM_PLANES__]; member
1300 dml_bool_t *Interlace; member
1543 dml_bool_t *Interlace; member
H A Ddml_display_rq_dlg_calc.c215 dml_bool_t interlaced = timing->Interlace[plane_idx]; in dml_rq_dlg_get_dlg_reg()
H A Ddisplay_mode_core.c219 dml_bool_t Interlace,
2388 dml_bool_t Interlace, in CalculatePrefetchSourceLines() argument
2419 …*VInitPreFill = (dml_uint_t)(dml_floor((VRatio + (dml_float_t) VTaps + 1 + Interlace * 0.5 * VRati… in CalculatePrefetchSourceLines()
2711 if (display_cfg->timing.Interlace[k] == 1 && ptoi_supported == true) { in PixelClockAdjustmentForProgressiveToInterlaceUnit()
3938 dml_bool_t isInterlaceTiming = p->Interlace[k] && !p->ProgressiveToInterlaceUnitInOPP; in CalculateStutterEfficiency()
4686 p->Interlace[k], in UseMinimumDCFCLK()
6218 if (timing->Interlace[plane_idx] && !ptoi_supported) in CalculateMaxVStartup()
6393 myPipe->InterlaceEnable = mode_lib->ms.cache_display_cfg.timing.Interlace[k]; in dml_prefetch_check()
7409 …put.OutputFormat[k] == dml_420 && mode_lib->ms.cache_display_cfg.timing.Interlace[k] == 1 && mode_… in dml_core_mode_support()
7747 s->SurfParameters[k].InterlaceEnable = mode_lib->ms.cache_display_cfg.timing.Interlace[k]; in dml_core_mode_support()
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H A Ddisplay_mode_util.c546 dml_print("DML: timing_cfg: plane=%d, Interlace = %d\n", i, timing->Interlace[i]); in dml_print_dml_display_cfg_timing()
H A Ddml2_translation_helper.c771 out->Interlace[location] = (in->timing.flags.INTERLACE != 0); in populate_dml_timing_cfg_from_stream_state()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.c594 mode_lib->vba.Interlace[mode_lib->vba.NumberOfActivePlanes] = dst->interlaced; in fetch_pipe_params()
1055 if (mode_lib->vba.Interlace[k] == 1 in PixelClockAdjustmentForProgressiveToInterlaceUnit()
H A Ddisplay_mode_vba.h498 bool Interlace[DC__NUM_DPP__MAX]; member
/linux/drivers/gpu/drm/amd/display/dc/bios/
H A Dbios_parser.c1442 lvds->sLCDTiming.susModeMiscInfo.sbfAccess.Interlace; in get_embedded_panel_info_v1_2()
1564 lvds->sLCDTiming.susModeMiscInfo.sbfAccess.Interlace; in get_embedded_panel_info_v1_3()
/linux/drivers/gpu/drm/radeon/
H A Datombios.h3246 USHORT Interlace:1; member
3262 USHORT Interlace:1;
/linux/drivers/gpu/drm/amd/include/
H A Datombios.h3723 USHORT Interlace:1; member
3739 USHORT Interlace:1;
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c1833 bool Interlace, in CalculatePrefetchSourceLines() argument
1865 …*VInitPreFill = (unsigned int)(math_floor2((VRatio + (double)VTaps + 1 + (Interlace ? 1 : 0) * 0.5… in CalculatePrefetchSourceLines()