Searched refs:IS_ROCKETLAKE (Results 1 – 19 of 19) sorted by relevance
142 IS_ROCKETLAKE(i915) || in has_phy_misc()212 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in phy_is_master()
268 if (IS_ROCKETLAKE(dev_priv)) { in icl_get_qgv_points()756 else if (IS_ROCKETLAKE(dev_priv)) in intel_bw_init_hw()
3372 } else if (IS_ROCKETLAKE(i915)) { in icl_get_combo_phy_dpll()3705 } else if (IS_ROCKETLAKE(i915)) { in icl_pll_get_hw_state()3769 } else if (IS_ROCKETLAKE(i915)) { in icl_dpll_write()4324 else if (IS_ROCKETLAKE(i915)) in intel_shared_dpll_init()
373 if (DISPLAY_VER(i915) == 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A) in intel_dsc_power_domain()
198 } else if (IS_ROCKETLAKE(i915)) { in dmc_firmware_default()
1728 } else if (IS_ROCKETLAKE(i915)) { in intel_ddi_buf_trans_init()
1339 if ((IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) && in i915_audio_component_init()
5255 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_ddi_init()5332 else if (IS_ROCKETLAKE(dev_priv)) in intel_ddi_init()
2560 if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || in tgl_plane_has_mc_ccs()
2917 else if (IS_ROCKETLAKE(dev_priv)) in intel_hdmi_default_ddc_pin()
3775 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_init_cdclk_hooks()
1422 if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_psr2_config_valid()
61 #define IS_ROCKETLAKE(dev_priv) IS_PLATFORM(dev_priv, XE_ROCKETLAKE) macro
193 } else if (IS_ROCKETLAKE(i915)) { in intel_step_init()
523 #define IS_ROCKETLAKE(i915) IS_PLATFORM(i915, INTEL_ROCKETLAKE) macro
2246 IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2259 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2279 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2288 if (IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) { in rcs_engine_wa_init()
480 } else if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in get_mocs_settings()
40 if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in uc_expand_default_options()
500 !IS_ROCKETLAKE(i915) && !IS_ALDERLAKE_S(i915)) { in set_proto_ctx_engines_bond()