Home
last modified time | relevance | path

Searched refs:IS_G4X (Results 1 – 25 of 34) sorted by relevance

12

/linux/drivers/gpu/drm/i915/display/
H A Dintel_fbc.c221 else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) in intel_fbc_max_cfb_height()
447 if (IS_G4X(i915)) in g4x_dpfc_ctl()
763 if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) in intel_fbc_cfb_base_max()
797 if (IS_G4X(i915)) in intel_fbc_max_limit()
845 if (DISPLAY_VER(display) < 5 && !IS_G4X(i915)) { in intel_fbc_alloc_cfb()
994 else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) in stride_is_valid()
1034 if (IS_G4X(i915)) in g4x_fbc_pixel_format_is_valid()
1065 else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) in pixel_format_is_valid()
1100 else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) in rotation_is_valid()
1120 } else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) { in intel_fbc_max_surface_size()
[all …]
H A Dg4x_hdmi.c143 if (IS_G4X(i915)) in g4x_hdmi_compute_config()
624 if (!IS_G4X(i915)) in g4x_hdmi_connector_atomic_check()
674 if (IS_G4X(i915) || IS_VALLEYVIEW(i915)) in is_hdmi_port_valid()
782 if (IS_G4X(dev_priv)) in g4x_hdmi_init()
H A Dintel_wm.c201 IS_G4X(dev_priv)) in wm_latency_show()
262 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in pri_wm_latency_open()
H A Dintel_hotplug_irq.c139 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in intel_hpd_init_pins()
421 if (IS_G4X(dev_priv) || in i9xx_hpd_irq_ack()
463 if (IS_G4X(dev_priv) || in i9xx_hpd_irq_handler()
478 if ((IS_G4X(dev_priv) || in i9xx_hpd_irq_handler()
1405 if (IS_G4X(dev_priv)) in i915_hpd_irq_setup()
H A Di9xx_plane.c144 else if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_plane_has_windowing()
164 if (IS_G4X(dev_priv) || IS_IRONLAKE(dev_priv) || in i9xx_plane_ctl()
934 else if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in intel_primary_plane_create()
972 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in intel_primary_plane_create()
H A Dintel_crtc.c113 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in intel_crtc_max_vblank_count()
346 IS_VALLEYVIEW(dev_priv) || IS_G4X(dev_priv)) in intel_crtc_init()
H A Dintel_atomic_plane.c550 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in intel_plane_atomic_calc_changes()
553 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in intel_plane_atomic_calc_changes()
556 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) { in intel_plane_atomic_calc_changes()
H A Dg4x_dp.c64 if (IS_G4X(dev_priv)) { in g4x_dp_set_clock()
149 if (IS_G4X(dev_priv) && pipe_config->limited_color_range) in intel_dp_prepare()
392 if (IS_G4X(dev_priv) && tmp & DP_COLOR_RANGE_16_235) in intel_dp_get_config()
H A Dintel_cursor.c391 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in i9xx_cursor_ctl_crtc()
745 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_cursor_get_hw_state()
H A Dintel_vblank.c335 IS_G4X(dev_priv) || DISPLAY_VER(display) == 2 || in i915_get_crtc_scanoutpos()
H A Dintel_display.c2939 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_set_pipeconf()
3072 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_get_pipe_config()
4273 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv) && in intel_crtc_atomic_check()
4394 if ((IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in compute_baseline_pipe_bpp()
4634 if (IS_G4X(dev_priv) || in intel_crtc_prepare_cleared_state()
5413 if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5) in intel_pipe_config_compare()
7907 if (!found && IS_G4X(dev_priv)) { in intel_setup_outputs()
7913 if (!found && IS_G4X(dev_priv)) in intel_setup_outputs()
7926 if (IS_G4X(dev_priv)) { in intel_setup_outputs()
7931 if (IS_G4X(dev_priv)) in intel_setup_outputs()
[all …]
H A Dintel_display_device.c1586 } else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915)) { in __intel_display_device_info_runtime_init()
1702 DISPLAY_VER(i915) < 5 && !IS_G4X(i915)) in intel_display_device_info_runtime_init()
H A Dintel_crt.c952 if (ret || !IS_G4X(dev_priv)) in intel_crt_get_modes()
H A Dintel_dpll.c1028 if (IS_G4X(dev_priv)) { in i9xx_dpll()
1806 else if (IS_G4X(dev_priv)) in intel_dpll_init_clock_hook()
H A Dintel_audio.c884 if (IS_G4X(i915)) in intel_audio_hooks_init()
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_clock_utils.c168 else if (IS_G4X(uncore->i915)) in read_clock_frequency()
H A Dselftest_gt_pm.c46 if (GRAPHICS_VER(i915) == 5 || IS_G4X(i915)) in read_timestamp()
H A Dgen2_engine_cs.c79 if (IS_G4X(rq->i915) || GRAPHICS_VER(rq->i915) == 5) in gen4_emit_flush_rcs()
H A Dselftest_engine_cs.c48 if (GRAPHICS_VER(i915) == 5 || IS_G4X(i915)) in timestamp_reg()
H A Dintel_reset.c689 else if (IS_G4X(i915)) in intel_get_gpu_reset()
/linux/drivers/gpu/drm/xe/compat-i915-headers/
H A Di915_drv.h38 #define IS_G4X(dev_priv) (dev_priv && 0) macro
/linux/drivers/gpu/drm/i915/gem/
H A Di915_gem_stolen.c101 !IS_G33(i915) && !IS_PINEVIEW(i915) && !IS_G4X(i915)) { in adjust_stolen()
476 } else if (GRAPHICS_VER(i915) >= 5 || IS_G4X(i915)) { in init_reserved_stolen()
/linux/drivers/gpu/drm/i915/
H A Di915_irq.c1169 if (IS_G4X(i915)) in i965_error_mask()
1202 if (IS_G4X(dev_priv)) in i965_irq_postinstall()
H A Dintel_clock_gating.c774 else if (IS_G4X(i915)) in intel_clock_gating_hooks_init()
H A Di915_drv.h503 #define IS_G4X(i915) (IS_G45(i915) || IS_GM45(i915)) macro

12