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Searched refs:IS_G4X (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_fbc.c222 else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) in intel_fbc_max_cfb_height()
448 if (IS_G4X(i915)) in g4x_dpfc_ctl()
764 if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) in intel_fbc_cfb_base_max()
798 if (IS_G4X(i915)) in intel_fbc_max_limit()
846 if (DISPLAY_VER(display) < 5 && !IS_G4X(i915)) { in intel_fbc_alloc_cfb()
995 else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) in stride_is_valid()
1035 if (IS_G4X(i915)) in g4x_fbc_pixel_format_is_valid()
1066 else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) in pixel_format_is_valid()
1101 else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) in rotation_is_valid()
1121 } else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) { in intel_fbc_max_surface_size()
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H A Dg4x_hdmi.c144 if (IS_G4X(i915)) in g4x_hdmi_compute_config()
624 if (!IS_G4X(i915)) in g4x_hdmi_connector_atomic_check()
674 if (IS_G4X(i915) || IS_VALLEYVIEW(i915)) in is_hdmi_port_valid()
781 if (IS_G4X(dev_priv)) in g4x_hdmi_init()
H A Dintel_hotplug_irq.c139 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in intel_hpd_init_pins()
421 if (IS_G4X(dev_priv) || in i9xx_hpd_irq_ack()
463 if (IS_G4X(dev_priv) || in i9xx_hpd_irq_handler()
478 if ((IS_G4X(dev_priv) || in i9xx_hpd_irq_handler()
1412 if (IS_G4X(dev_priv)) in i915_hpd_irq_setup()
H A Di9xx_plane.c145 else if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_plane_has_windowing()
165 if (IS_G4X(dev_priv) || IS_IRONLAKE(dev_priv) || in i9xx_plane_ctl()
941 else if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in intel_primary_plane_create()
979 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in intel_primary_plane_create()
H A Dintel_crtc.c116 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in intel_crtc_max_vblank_count()
356 IS_VALLEYVIEW(dev_priv) || IS_G4X(dev_priv)) in intel_crtc_init()
H A Dg4x_dp.c66 if (IS_G4X(dev_priv)) { in g4x_dp_set_clock()
151 if (IS_G4X(dev_priv) && pipe_config->limited_color_range) in intel_dp_prepare()
393 if (IS_G4X(dev_priv) && tmp & DP_COLOR_RANGE_16_235) in intel_dp_get_config()
H A Dintel_cursor.c393 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in i9xx_cursor_ctl_crtc()
751 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_cursor_get_hw_state()
H A Dintel_display.c3045 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_set_pipeconf()
3183 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_get_pipe_config()
4561 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv) && in intel_crtc_atomic_check()
4671 if ((IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in compute_baseline_pipe_bpp()
4911 if (IS_G4X(dev_priv) || in intel_crtc_prepare_cleared_state()
5671 if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5) in intel_pipe_config_compare()
8264 if (!found && IS_G4X(dev_priv)) { in intel_setup_outputs()
8270 if (!found && IS_G4X(dev_priv)) in intel_setup_outputs()
8283 if (IS_G4X(dev_priv)) { in intel_setup_outputs()
8288 if (IS_G4X(dev_priv)) in intel_setup_outputs()
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H A Dintel_crt.c963 if (ret || !IS_G4X(dev_priv)) in intel_crt_get_modes()
H A Dintel_dpll.c1033 if (IS_G4X(dev_priv)) { in i9xx_dpll()
1819 else if (IS_G4X(dev_priv)) in intel_dpll_init_clock_hook()
H A Dintel_hdmi.c1033 if (IS_G4X(dev_priv) || !crtc_state->has_infoframe) in intel_hdmi_compute_gcp_infoframe()
3012 } else if (IS_G4X(dev_priv)) { in intel_infoframe_init()
H A Dintel_audio.c886 if (IS_G4X(i915)) in intel_audio_hooks_init()
H A Dintel_display_debugfs.c98 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) || in i915_sr_status()
H A Di9xx_wm.c158 } else if (IS_G4X(dev_priv) || IS_I965GM(dev_priv)) { in _intel_set_memory_cxsr()
246 else if (IS_G4X(dev_priv)) in intel_set_memory_cxsr()
4167 } else if (IS_G4X(dev_priv)) { in i9xx_wm_init()
H A Dintel_sprite.c1210 if (IS_G4X(dev_priv)) in g4x_sprite_update_arm()
H A Dintel_display_irq.c403 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_pipe_crc_irq_handler()
H A Dintel_backlight.c1113 if (IS_G4X(i915)) in i965_hz_to_pwm()
/linux/drivers/gpu/drm/xe/compat-i915-headers/
H A Di915_drv.h39 #define IS_G4X(dev_priv) (dev_priv && 0) macro
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_clock_utils.c168 else if (IS_G4X(uncore->i915)) in read_clock_frequency()
H A Dselftest_gt_pm.c46 if (GRAPHICS_VER(i915) == 5 || IS_G4X(i915)) in read_timestamp()
H A Dselftest_engine_cs.c48 if (GRAPHICS_VER(i915) == 5 || IS_G4X(i915)) in timestamp_reg()
H A Dintel_reset.c689 else if (IS_G4X(i915)) in intel_get_gpu_reset()
H A Dintel_workarounds.c1690 else if (IS_G4X(i915)) in gt_init_workarounds()
/linux/drivers/gpu/drm/i915/
H A Di915_irq.c986 if (IS_G4X(i915)) in i965_error_mask()
1018 if (IS_G4X(dev_priv)) in i965_irq_postinstall()
H A Di915_drv.h501 #define IS_G4X(i915) (IS_G45(i915) || IS_GM45(i915)) macro