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Searched refs:ISR (Results 1 – 25 of 48) sorted by relevance

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/linux/drivers/net/wireless/ath/wil6210/
H A DKconfig20 bool "Use Clear-On-Read mode for ISR registers for wil6210"
24 ISR registers on wil6210 chip may operate in either
28 For ISR debug, use W1C (say n); is allows to monitor ISR
29 registers with debugfs. If COR were used, ISR would
/linux/arch/arc/kernel/
H A Dentry-compact.S145 ; Level 2 ISR: Can interrupt a Level 1 ISR
152 ; if L2 IRQ interrupted a L1 ISR, disable preemption
156 ; -L2 interrupts L1 (before L1 ISR could run)
180 ; setup params for Linux common ISR and invoke it
223 ; Level 1 ISR
343 ; if L2 IRQ interrupted an L1 ISR, we'd disabled preemption earlier
/linux/sound/pci/aw2/
H A Daw2-saa7146.c336 isr = READREG(ISR); in snd_aw2_saa7146_interrupt()
340 WRITEREG(isr, ISR); in snd_aw2_saa7146_interrupt()
H A Dsaa7146.h33 #define ISR 0x10C macro
/linux/drivers/usb/serial/
H A Dio_16654.h34 #define ISR 2 // Interrupt Status Register (Read) macro
/linux/drivers/net/ethernet/realtek/
H A Datp.c618 int status = read_nibble(ioaddr, ISR); in atp_interrupt()
624 write_reg(ioaddr, ISR, ISR_RxOK); /* Clear the Rx interrupt. */ in atp_interrupt()
637 write_reg_high(ioaddr, ISR, ISRh_RxErr); in atp_interrupt()
651 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK); in atp_interrupt()
H A Datp.h40 ISR = 10, IMR = 11, /* Interrupt status and mask. */ enumerator
/linux/include/media/drv-intf/
H A Dsaa7146.h55 saa7146_write(x, ISR, (y));
378 #define ISR 0x10C /* Interrupt status register */ macro
/linux/drivers/video/fbdev/i810/
H A Di810_regs.h47 #define ISR 0x020AC macro
/linux/drivers/net/ethernet/via/
H A Dvia-velocity.h985 volatile __le32 ISR; /* 0x24 */ member
1147 #define mac_read_isr(regs) readl(&((regs)->ISR))
1148 #define mac_write_isr(regs, x) writel((x),&((regs)->ISR))
1149 #define mac_clear_isr(regs) writel(0xffffffffL,&((regs)->ISR))
/linux/arch/m68k/68000/
H A Dints.c85 unsigned long pend = ISR; in process_int()
/linux/sound/soc/intel/keembay/
H A Dkmb_platform.h40 #define ISR(x) (0x40 * (x) + 0x038) macro
/linux/drivers/net/ethernet/cadence/
H A Dmacb_main.c1659 queue_writel(queue, ISR, MACB_BIT(RCOMP)); in macb_rx_poll()
1747 queue_writel(queue, ISR, MACB_BIT(TCOMP)); in macb_tx_poll()
1801 status = queue_readl(queue, ISR); in macb_wol_interrupt()
1815 queue_writel(queue, ISR, MACB_BIT(WOL)); in macb_wol_interrupt()
1830 status = queue_readl(queue, ISR); in gem_wol_interrupt()
1844 queue_writel(queue, ISR, GEM_BIT(WOL)); in gem_wol_interrupt()
1860 status = queue_readl(queue, ISR); in macb_interrupt()
1872 queue_writel(queue, ISR, -1); in macb_interrupt()
1889 queue_writel(queue, ISR, MACB_BIT(RCOMP)); in macb_interrupt()
1901 queue_writel(queue, ISR, MACB_BIT(TCOMP) | in macb_interrupt()
[all …]
/linux/drivers/video/fbdev/
H A Di740_reg.h232 #define ISR 0x3036 macro
/linux/sound/soc/dwc/
H A Dlocal.h48 #define ISR(x) (0x40 * x + 0x038) macro
/linux/drivers/mtd/nand/raw/
H A Dtegra_nand.c45 #define ISR 0x08 macro
256 isr = readl_relaxed(ctrl->regs + ISR); in tegra_nand_irq()
287 writel_relaxed(isr, ctrl->regs + ISR); in tegra_nand_irq()
339 isr = readl_relaxed(ctrl->regs + ISR); in tegra_nand_controller_abort()
340 writel_relaxed(isr, ctrl->regs + ISR); in tegra_nand_controller_abort()
/linux/Documentation/networking/device_drivers/can/ctu/
H A Dctucanfd-driver.rst176 - Signal TX completion and errors to the network subsystem: ISR
178 - Submit RX frames to the network subsystem: ISR and NAPI
182 in an Interrupt Service Routine (ISR). Handlers for the events
197 It is then re-enabled later in ISR when the device has some space
200 All the device events are handled in ISR, namely:
225 interrupt handling in that it only acknowledges the interrupt in the ISR
229 enabling interrupts, handling an incoming IRQ in ISR, re-enabling the
334 Frame reception is handled in NAPI queue, which is enabled from ISR when
/linux/drivers/media/common/saa7146/
H A Dsaa7146_core.c276 ack_isr = isr = saa7146_read(dev, ISR); in interrupt_hw()
322 saa7146_write(dev, ISR, ack_isr); in interrupt_hw()
/linux/drivers/irqchip/
H A Dirq-xilinx-intc.c23 #define ISR 0x00 /* Interrupt Status Register */ macro
/linux/Documentation/scsi/
H A DChangeLog.arcmsr61 ** 4.modify the ISR, arcmsr_interrupt routine,to prevent the
/linux/drivers/edac/
H A Dversalnet_edac.c190 ISR = 0, enumerator
216 isr = error_data[ISR]; in get_ddr_info()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
H A Dhw.c1020 intvec->inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92de_interrupt_recognized()
1021 rtl_write_dword(rtlpriv, ISR, intvec->inta); in rtl92de_interrupt_recognized()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
H A Dhw.c1544 intvec->inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92se_interrupt_recognized()
1545 rtl_write_dword(rtlpriv, ISR, intvec->inta); in rtl92se_interrupt_recognized()
1547 intvec->intb = rtl_read_dword(rtlpriv, ISR + 4) & rtlpci->irq_mask[1]; in rtl92se_interrupt_recognized()
1548 rtl_write_dword(rtlpriv, ISR + 4, intvec->intb); in rtl92se_interrupt_recognized()
/linux/drivers/gpu/drm/gma500/
H A Dpsb_intel_reg.h754 #define ISR 0x020ac macro
/linux/arch/m68k/include/asm/
H A DMC68EZ328.h283 #define ISR LONG_REF(ISR_ADDR) macro

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