Searched refs:IRQ_VIRT_BASE (Results 1 – 4 of 4) sorted by relevance
26 #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) macro37 #define IRQ_MASK_LOW (IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)38 #define FIQ_MASK_LOW (IRQ_VIRT_BASE + FIQ_MASK_LOW_OFF)39 #define ENDPOINT_MASK_LOW (IRQ_VIRT_BASE + ENDPOINT_MASK_LOW_OFF)40 #define IRQ_MASK_HIGH (IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)41 #define FIQ_MASK_HIGH (IRQ_VIRT_BASE + FIQ_MASK_HIGH_OFF)42 #define ENDPOINT_MASK_HIGH (IRQ_VIRT_BASE + ENDPOINT_MASK_HIGH_OFF)43 #define PCIE_INTERRUPT_MASK (IRQ_VIRT_BASE + PCIE_INTERRUPT_MASK_OFF)
40 static void __iomem *dove_irq_base = IRQ_VIRT_BASE;65 orion_irq_init(1, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); in dove_init_irq()66 orion_irq_init(33, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); in dove_init_irq()
24 static void __iomem *mv78xx0_irq_base = IRQ_VIRT_BASE;56 orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); in mv78xx0_init_irq()57 orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); in mv78xx0_init_irq()58 orion_irq_init(64, IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF); in mv78xx0_init_irq()
20 #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) macro