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Searched refs:IP5_15_12 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c132 #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12)
206 #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
280 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
578 PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N),
579 PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC),
580 PINMUX_IPSR_GPSR(IP5_15_12, D2),
2286 IP5_15_12
H A Dpfc-r8a77980.c147 #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12)
240 #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
330 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
655 PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N),
656 PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC),
657 PINMUX_IPSR_GPSR(IP5_15_12, D2),
2740 IP5_15_12
H A Dpfc-r8a77995.c116 #define GPSR2_6 F_(VI4_DATA5, IP5_15_12)
255 #define IP5_15_12 FM(VI4_DATA5) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
372 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
701 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA5),
702 PINMUX_IPSR_MSEL(IP5_15_12, SCK4_A, SEL_SCIF4_0),
2727 IP5_15_12
H A Dpfc-r8a77990.c89 #define GPSR1_21 F_(CS0_N, IP5_15_12)
259 #define IP5_15_12 FM(CS0_N) FM(SCL5) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR0) FM(VI4_DATA2_B) F_(… macro
398 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
820 PINMUX_IPSR_GPSR(IP5_15_12, CS0_N),
821 PINMUX_IPSR_GPSR(IP5_15_12, SCL5),
822 PINMUX_IPSR_GPSR(IP5_15_12, DU_DR0),
823 PINMUX_IPSR_MSEL(IP5_15_12, VI4_DATA2_B, SEL_VIN4_1),
824 PINMUX_IPSR_GPSR(IP5_15_12, LCDOUT16),
4843 IP5_15_12
H A Dpfc-r8a77965.c101 #define GPSR0_0 F_(D0, IP5_15_12)
303 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0)… macro
461 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
931 PINMUX_IPSR_GPSR(IP5_15_12, D0),
932 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1),
933 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0),
934 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16),
935 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0),
5597 IP5_15_12
H A Dpfc-r8a77951.c96 #define GPSR0_0 F_(D0, IP5_15_12)
298 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0)… macro
456 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
925 PINMUX_IPSR_GPSR(IP5_15_12, D0),
926 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1),
927 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0),
928 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16),
929 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0),
5401 IP5_15_12
H A Dpfc-r8a7796.c101 #define GPSR0_0 F_(D0, IP5_15_12)
303 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0)… macro
461 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
929 PINMUX_IPSR_GPSR(IP5_15_12, D0),
930 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1),
931 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0),
932 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16),
933 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0),
5356 IP5_15_12
H A Dpfc-r8a77470.c718 PINMUX_IPSR_GPSR(IP5_15_12, DU0_DG2),
719 PINMUX_IPSR_MSEL(IP5_15_12, RX4_D, SEL_SCIF4_3),
720 PINMUX_IPSR_GPSR(IP5_15_12, A10),