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Searched refs:IP4_27_24 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c101 #define GPSR2_15 F_(VI0_DATA11, IP4_27_24)
202 #define IP4_27_24 FM(VI0_DATA11) FM(HTX2) FM(PWM3_A) FM(A25) FM(FSO_TOE_N_B) F_(0, 0) F_(0, 0)… macro
284 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
555 PINMUX_IPSR_GPSR(IP4_27_24, VI0_DATA11),
556 PINMUX_IPSR_GPSR(IP4_27_24, HTX2),
557 PINMUX_IPSR_MSEL(IP4_27_24, PWM3_A, SEL_PWM3_0),
558 PINMUX_IPSR_MSEL(IP4_27_24, FSO_TOE_N_B, SEL_RFSO_1),
2274 IP4_27_24
H A Dpfc-r8a77980.c116 #define GPSR2_15 F_(VI0_DATA11, IP4_27_24)
236 #define IP4_27_24 FM(VI0_DATA11) FM(HTX2) FM(PWM3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
334 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
634 PINMUX_IPSR_GPSR(IP4_27_24, VI0_DATA11),
635 PINMUX_IPSR_GPSR(IP4_27_24, HTX2),
636 PINMUX_IPSR_MSEL(IP4_27_24, PWM3_A, SEL_PWM3_0),
2728 IP4_27_24
H A Dpfc-r8a77990.c95 #define GPSR1_15 F_(A15, IP4_27_24)
254 #define IP4_27_24 FM(A15) FM(MSIOF1_SS2) FM(MSIOF2_TXD_B) FM(VI4_DATA18) FM(VI5_DATA4_A) FM(DU… macro
401 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
780 PINMUX_IPSR_GPSR(IP4_27_24, A15),
781 PINMUX_IPSR_GPSR(IP4_27_24, MSIOF1_SS2),
782 PINMUX_IPSR_GPSR(IP4_27_24, MSIOF2_TXD_B),
783 PINMUX_IPSR_GPSR(IP4_27_24, VI4_DATA18),
784 PINMUX_IPSR_MSEL(IP4_27_24, VI5_DATA4_A, SEL_VIN5_0),
785 PINMUX_IPSR_GPSR(IP4_27_24, DU_DB4),
786 PINMUX_IPSR_GPSR(IP4_27_24, LCDOUT4),
[all …]
H A Dpfc-r8a77995.c57 #define GPSR1_31 F_(QPOLB, IP4_27_24)
250 #define IP4_27_24 FM(QPOLB) F_(0, 0) FM(TX3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… macro
375 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
686 PINMUX_IPSR_GPSR(IP4_27_24, QPOLB),
687 PINMUX_IPSR_MSEL(IP4_27_24, TX3_B, SEL_SCIF3_1),
2715 IP4_27_24
H A Dpfc-r8a7796.c109 #define GPSR1_23 F_(RD_N, IP4_27_24)
299 #define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_… macro
465 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
893 PINMUX_IPSR_GPSR(IP4_27_24, RD_N),
894 PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3),
895 PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0),
896 PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0),
897 PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0),
898 PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0),
5344 IP4_27_24
H A Dpfc-r8a77951.c104 #define GPSR1_23 F_(RD_N, IP4_27_24)
294 #define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_… macro
460 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
889 PINMUX_IPSR_GPSR(IP4_27_24, RD_N),
890 PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3),
891 PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0),
892 PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0),
893 PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0),
894 PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0),
5389 IP4_27_24
H A Dpfc-r8a77965.c109 #define GPSR1_23 F_(RD_N, IP4_27_24)
299 #define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_… macro
465 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
895 PINMUX_IPSR_GPSR(IP4_27_24, RD_N),
896 PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3),
897 PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0),
898 PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0),
899 PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0),
900 PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0),
5585 IP4_27_24
H A Dpfc-r8a77470.c696 PINMUX_IPSR_GPSR(IP4_27_24, DU0_DR5),
697 PINMUX_IPSR_MSEL(IP4_27_24, TX1_D, SEL_SCIF1_3),
698 PINMUX_IPSR_GPSR(IP4_27_24, PWM1_B),
699 PINMUX_IPSR_GPSR(IP4_27_24, A5),