| /linux/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77970.c | 112 #define GPSR2_4 F_(VI0_DATA0, IP3_15_12)
190 #define IP3_15_12 FM(VI0_DATA0) FM(MSIOF2_SS1) FM(RTS3_N) F_(0, 0) FM(HRX3) F_(0, 0) F_(0, 0) F… macro
271 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
505 PINMUX_IPSR_GPSR(IP3_15_12, VI0_DATA0),
506 PINMUX_IPSR_GPSR(IP3_15_12, MSIOF2_SS1),
507 PINMUX_IPSR_GPSR(IP3_15_12, RTS3_N),
508 PINMUX_IPSR_GPSR(IP3_15_12, HRX3),
2266 IP3_15_12
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| H A D | pfc-r8a77980.c | 127 #define GPSR2_4 F_(VI0_DATA0, IP3_15_12)
224 #define IP3_15_12 FM(VI0_DATA0) FM(MSIOF2_SS1) FM(RTS3_N) F_(0, 0) FM(HRX3) F_(0, 0) F_(0, 0) F… macro
321 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
589 PINMUX_IPSR_GPSR(IP3_15_12, VI0_DATA0),
590 PINMUX_IPSR_GPSR(IP3_15_12, MSIOF2_SS1),
591 PINMUX_IPSR_GPSR(IP3_15_12, RTS3_N),
592 PINMUX_IPSR_GPSR(IP3_15_12, HRX3),
2720 IP3_15_12
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| H A D | pfc-r8a77990.c | 106 #define GPSR1_4 F_(A4, IP3_15_12)
241 #define IP3_15_12 FM(A4) FM(RTS4_N_A) FM(MSIOF3_SYNC_B) FM(VI4_DATA8) FM(PWM2_B) FM(DU_DG4) FM… macro
389 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
693 PINMUX_IPSR_GPSR(IP3_15_12, A4),
694 PINMUX_IPSR_MSEL(IP3_15_12, RTS4_N_A, SEL_SCIF4_0),
695 PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SYNC_B, SEL_MSIOF3_1),
696 PINMUX_IPSR_GPSR(IP3_15_12, VI4_DATA8),
697 PINMUX_IPSR_MSEL(IP3_15_12, PWM2_B, SEL_PWM2_1),
698 PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4),
699 PINMUX_IPSR_MSEL(IP3_15_12, RIF2_CLK_B, SEL_DRIF2_1),
[all …]
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| H A D | pfc-r8a77995.c | 68 #define GPSR1_20 F_(DU_DR4, IP3_15_12)
237 #define IP3_15_12 FM(DU_DR4) FM(LCDOUT20) FM(TCLK2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… macro
363 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
641 PINMUX_IPSR_GPSR(IP3_15_12, DU_DR4),
642 PINMUX_IPSR_GPSR(IP3_15_12, LCDOUT20),
643 PINMUX_IPSR_MSEL(IP3_15_12, TCLK2_B, SEL_TMU_0_1),
2707 IP3_15_12
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| H A D | pfc-r8a77965.c | 120 #define GPSR1_12 F_(A12, IP3_15_12)
287 #define IP3_15_12 FM(A12) FM(LCDOUT12) FM(MSIOF3_SCK_C) F_(0, 0) FM(HRX4_A) FM(VI5_DATA8) FM(DU… macro
452 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
829 PINMUX_IPSR_GPSR(IP3_15_12, A12),
830 PINMUX_IPSR_GPSR(IP3_15_12, LCDOUT12),
831 PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SCK_C, SEL_MSIOF3_2),
832 PINMUX_IPSR_MSEL(IP3_15_12, HRX4_A, SEL_HSCIF4_0),
833 PINMUX_IPSR_GPSR(IP3_15_12, VI5_DATA8),
834 PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4),
5577 IP3_15_12
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| H A D | pfc-r8a77951.c | 115 #define GPSR1_12 F_(A12, IP3_15_12)
282 #define IP3_15_12 FM(A12) FM(LCDOUT12) FM(MSIOF3_SCK_C) F_(0, 0) FM(HRX4_A) FM(VI5_DATA8) FM(DU… macro
447 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
823 PINMUX_IPSR_GPSR(IP3_15_12, A12),
824 PINMUX_IPSR_GPSR(IP3_15_12, LCDOUT12),
825 PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SCK_C, SEL_MSIOF3_2),
826 PINMUX_IPSR_MSEL(IP3_15_12, HRX4_A, SEL_HSCIF4_0),
827 PINMUX_IPSR_GPSR(IP3_15_12, VI5_DATA8),
828 PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4),
5381 IP3_15_12
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| H A D | pfc-r8a7796.c | 120 #define GPSR1_12 F_(A12, IP3_15_12)
287 #define IP3_15_12 FM(A12) FM(LCDOUT12) FM(MSIOF3_SCK_C) F_(0, 0) FM(HRX4_A) FM(VI5_DATA8) FM(DU… macro
452 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
827 PINMUX_IPSR_GPSR(IP3_15_12, A12),
828 PINMUX_IPSR_GPSR(IP3_15_12, LCDOUT12),
829 PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SCK_C, SEL_MSIOF3_2),
830 PINMUX_IPSR_MSEL(IP3_15_12, HRX4_A, SEL_HSCIF4_0),
831 PINMUX_IPSR_GPSR(IP3_15_12, VI5_DATA8),
832 PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4),
5336 IP3_15_12
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| H A D | pfc-r8a77470.c | 661 PINMUX_IPSR_GPSR(IP3_15_12, QSPI0_MOSI_QSPI0_IO0),
662 PINMUX_IPSR_GPSR(IP3_15_12, BS_N),
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