IP3_11_8 (reference) in projects: linux

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Searched refs:IP3_11_8 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/pinctrl/renesas/
H A D	pfc-r8a77970.c	`113 #define GPSR2_3 F_(VI0_VSYNC_N, IP3_11_8) 190 #define IP3_11_8 FM(VI0_VSYNC_N) FM(MSIOF2_SYNC) FM(CTS3_N) F_(0, 0) FM(HTX3) F_(0, 0) F_(0, 0)… macro 271 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 501 PINMUX_IPSR_GPSR(IP3_11_8, VI0_VSYNC_N), 502 PINMUX_IPSR_GPSR(IP3_11_8, MSIOF2_SYNC), 503 PINMUX_IPSR_GPSR(IP3_11_8, CTS3_N), 504 PINMUX_IPSR_GPSR(IP3_11_8, HTX3), 2268 IP3_11_8`
H A D	pfc-r8a77980.c	`128 #define GPSR2_3 F_(VI0_VSYNC_N, IP3_11_8) 224 #define IP3_11_8 FM(VI0_VSYNC_N) FM(MSIOF2_SYNC) FM(CTS3_N) F_(0, 0) FM(HTX3) F_(0, 0) F_(0, 0)… macro 321 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 585 PINMUX_IPSR_GPSR(IP3_11_8, VI0_VSYNC_N), 586 PINMUX_IPSR_GPSR(IP3_11_8, MSIOF2_SYNC), 587 PINMUX_IPSR_GPSR(IP3_11_8, CTS3_N), 588 PINMUX_IPSR_GPSR(IP3_11_8, HTX3), 2722 IP3_11_8`
H A D	pfc-r8a77990.c	107 #define GPSR1_3 F_(A3, IP3_11_8) 240 #define IP3_11_8 FM(A3) FM(CTS4_N_A) FM(PWM4_A) FM(VI4_DATA12) F_(0, 0) FM(DU_DOTCLKOUT0) FM(… macro 388 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 684 PINMUX_IPSR_GPSR(IP3_11_8, A3), 685 PINMUX_IPSR_MSEL(IP3_11_8, CTS4_N_A, SEL_SCIF4_0), 686 PINMUX_IPSR_MSEL(IP3_11_8, PWM4_A, SEL_PWM4_0), 687 PINMUX_IPSR_GPSR(IP3_11_8, VI4_DATA12), 688 PINMUX_IPSR_GPSR(IP3_11_8, DU_DOTCLKOUT0), 689 PINMUX_IPSR_GPSR(IP3_11_8, HTX3_D), 690 PINMUX_IPSR_GPSR(IP3_11_8, IECLK), [all …]
H A D	pfc-r8a77995.c	`69 #define GPSR1_19 F_(DU_DR3, IP3_11_8) 236 #define IP3_11_8 FM(DU_DR3) FM(LCDOUT19) FM(PWM1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro 362 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 638 PINMUX_IPSR_GPSR(IP3_11_8, DU_DR3), 639 PINMUX_IPSR_GPSR(IP3_11_8, LCDOUT19), 640 PINMUX_IPSR_MSEL(IP3_11_8, PWM1_B, SEL_PWM1_2), 2709 IP3_11_8`
H A D	pfc-r8a7796.c	121 #define GPSR1_11 F_(A11, IP3_11_8) 285 #define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0)… macro 452 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 818 PINMUX_IPSR_GPSR(IP3_11_8, A11), 819 PINMUX_IPSR_MSEL(IP3_11_8, TX3_B, SEL_SCIF3_1), 820 PINMUX_IPSR_MSEL(IP3_11_8, MSIOF2_TXD_A, SEL_MSIOF2_0), 821 PINMUX_IPSR_MSEL(IP3_11_8, HTX4_B, SEL_HSCIF4_1), 822 PINMUX_IPSR_GPSR(IP3_11_8, HSCK4), 823 PINMUX_IPSR_GPSR(IP3_11_8, VI5_FIELD), 824 PINMUX_IPSR_MSEL(IP3_11_8, SCL6_A, SEL_I2C6_0), [all …]
H A D	pfc-r8a77951.c	116 #define GPSR1_11 F_(A11, IP3_11_8) 282 #define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0)… macro 447 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 814 PINMUX_IPSR_GPSR(IP3_11_8, A11), 815 PINMUX_IPSR_MSEL(IP3_11_8, TX3_B, SEL_SCIF3_1), 816 PINMUX_IPSR_MSEL(IP3_11_8, MSIOF2_TXD_A, SEL_MSIOF2_0), 817 PINMUX_IPSR_MSEL(IP3_11_8, HTX4_B, SEL_HSCIF4_1), 818 PINMUX_IPSR_GPSR(IP3_11_8, HSCK4), 819 PINMUX_IPSR_GPSR(IP3_11_8, VI5_FIELD), 820 PINMUX_IPSR_MSEL(IP3_11_8, SCL6_A, SEL_I2C6_0), [all …]
H A D	pfc-r8a77965.c	121 #define GPSR1_11 F_(A11, IP3_11_8) 285 #define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0)… macro 452 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ 820 PINMUX_IPSR_GPSR(IP3_11_8, A11), 821 PINMUX_IPSR_MSEL(IP3_11_8, TX3_B, SEL_SCIF3_1), 822 PINMUX_IPSR_MSEL(IP3_11_8, MSIOF2_TXD_A, SEL_MSIOF2_0), 823 PINMUX_IPSR_MSEL(IP3_11_8, HTX4_B, SEL_HSCIF4_1), 824 PINMUX_IPSR_GPSR(IP3_11_8, HSCK4), 825 PINMUX_IPSR_GPSR(IP3_11_8, VI5_FIELD), 826 PINMUX_IPSR_MSEL(IP3_11_8, SCL6_A, SEL_I2C6_0), [all …]
H A D	pfc-r8a7790.c	`966 PINMUX_IPSR_GPSR(IP3_11_8, A13), 967 PINMUX_IPSR_MSEL(IP3_11_8, SCIFB2_RTS_N_B, SEL_SCIFB2_1), 968 PINMUX_IPSR_GPSR(IP3_11_8, EX_WAIT2), 969 PINMUX_IPSR_GPSR(IP3_11_8, MSIOF2_RXD), 970 PINMUX_IPSR_MSEL(IP3_11_8, VI1_R2, SEL_VI1_0), 971 PINMUX_IPSR_MSEL(IP3_11_8, VI1_R2_B, SEL_VI1_1), 972 PINMUX_IPSR_GPSR(IP3_11_8, VI2_G2), 973 PINMUX_IPSR_MSEL(IP3_11_8, VI2_DATA5_VI2_B5_B, SEL_VI2_1),`
H A D	pfc-r8a77470.c	`659 PINMUX_IPSR_GPSR(IP3_11_8, QSPI0_SPCLK), 660 PINMUX_IPSR_GPSR(IP3_11_8, WE0_N),`