| /linux/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77995.c | 73 #define GPSR1_15 F_(DU_DG7, IP2_27_24)
232 #define IP2_27_24 FM(DU_DG7) FM(LCDOUT15) FM(SCK4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
366 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
620 PINMUX_IPSR_GPSR(IP2_27_24, DU_DG7),
621 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT15),
622 PINMUX_IPSR_MSEL(IP2_27_24, SCK4_B, SEL_SCIF4_1),
2694 IP2_27_24
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| H A D | pfc-r8a77970.c | 97 #define GPSR1_0 F_(IRQ0, IP2_27_24)
185 #define IP2_27_24 FM(IRQ0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… macro
274 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
481 PINMUX_IPSR_GPSR(IP2_27_24, IRQ0),
2253 IP2_27_24
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| H A D | pfc-r8a77990.c | 113 #define GPSR2_25 F_(EX_WAIT0, IP2_27_24)
236 #define IP2_27_24 FM(EX_WAIT0) FM(SDA7_A) FM(AVB_AVTP_CAPTURE) FM(VI4_HSYNC_N) FM(RX5_B) FM(PWM… macro
392 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
647 PINMUX_IPSR_GPSR(IP2_27_24, EX_WAIT0),
648 PINMUX_IPSR_MSEL(IP2_27_24, SDA7_A, SEL_I2C7_0),
649 PINMUX_IPSR_GPSR(IP2_27_24, AVB_AVTP_CAPTURE),
650 PINMUX_IPSR_GPSR(IP2_27_24, VI4_HSYNC_N),
651 PINMUX_IPSR_MSEL(IP2_27_24, RX5_B, SEL_SCIF5_1),
652 PINMUX_IPSR_MSEL(IP2_27_24, PWM6_A, SEL_PWM6_0),
4810 IP2_27_24
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| H A D | pfc-r8a77965.c | 125 #define GPSR1_7 F_(A7, IP2_27_24)
280 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) … macro
455 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
792 PINMUX_IPSR_GPSR(IP2_27_24, A7),
793 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
794 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
795 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
796 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
797 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA15),
798 PINMUX_IPSR_GPSR(IP2_27_24, DU_DB7),
[all …]
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| H A D | pfc-r8a77951.c | 120 #define GPSR1_7 F_(A7, IP2_27_24)
277 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) … macro
450 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
786 PINMUX_IPSR_GPSR(IP2_27_24, A7),
787 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
788 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
789 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
790 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
791 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA15),
792 PINMUX_IPSR_GPSR(IP2_27_24, DU_DB7),
[all …]
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| H A D | pfc-r8a7796.c | 125 #define GPSR1_7 F_(A7, IP2_27_24)
280 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) … macro
455 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
790 PINMUX_IPSR_GPSR(IP2_27_24, A7),
791 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
792 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
793 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
794 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
795 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA15),
796 PINMUX_IPSR_GPSR(IP2_27_24, DU_DB7),
[all …]
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| H A D | pfc-r8a77980.c | 99 #define GPSR1_0 F_(IRQ0, IP2_27_24)
219 #define IP2_27_24 FM(IRQ0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… macro
324 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
565 PINMUX_IPSR_GPSR(IP2_27_24, IRQ0),
2707 IP2_27_24
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| H A D | pfc-r8a77470.c | 639 PINMUX_IPSR_GPSR(IP2_27_24, D12),
640 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SCK_A, SEL_MSIOF2_0),
641 PINMUX_IPSR_GPSR(IP2_27_24, HSCK0),
642 PINMUX_IPSR_MSEL(IP2_27_24, CAN_CLK_C, SEL_CANCLK_2),
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