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Searched refs:IP1_3_0 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c59 #define GPSR0_8 F_(DU_DG4, IP1_3_0)
171 #define IP1_3_0 FM(DU_DG4) F_(0, 0) F_(0, 0) FM(A8) FM(FSO_CFE_0_N_A) F_(0, 0) F_(0, 0) F_(0, … macro
268 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
426 PINMUX_IPSR_GPSR(IP1_3_0, DU_DG4),
427 PINMUX_IPSR_GPSR(IP1_3_0, A8),
428 PINMUX_IPSR_MSEL(IP1_3_0, FSO_CFE_0_N_A, SEL_RFSO_0),
2249 IP1_3_0 ))
H A Dpfc-r8a77980.c61 #define GPSR0_8 F_(DU_DG4, IP1_3_0)
205 #define IP1_3_0 FM(DU_DG4) FM(SCL5) F_(0, 0) FM(A8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… macro
318 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
500 PINMUX_IPSR_GPSR(IP1_3_0, DU_DG4),
501 PINMUX_IPSR_GPSR(IP1_3_0, SCL5),
502 PINMUX_IPSR_GPSR(IP1_3_0, A8),
2703 IP1_3_0 ))
H A Dpfc-r8a77995.c87 #define GPSR1_1 F_(DU_DB1, IP1_3_0)
218 #define IP1_3_0 FM(DU_DB1) FM(LCDOUT1) FM(MSIOF3_RXD_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… macro
360 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
564 PINMUX_IPSR_GPSR(IP1_3_0, DU_DB1),
565 PINMUX_IPSR_GPSR(IP1_3_0, LCDOUT1),
566 PINMUX_IPSR_MSEL(IP1_3_0, MSIOF3_RXD_B, SEL_MSIOF3_1),
2690 IP1_3_0 ))
H A Dpfc-r8a77965.c147 #define GPSR2_2 F_(IRQ2, IP1_3_0)
266 #define IP1_3_0 FM(IRQ2) FM(QCPV_QDE) F_(0, 0) FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(VI4_DATA2_B) F_… macro
449 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
695 PINMUX_IPSR_GPSR(IP1_3_0, IRQ2),
696 PINMUX_IPSR_GPSR(IP1_3_0, QCPV_QDE),
697 PINMUX_IPSR_GPSR(IP1_3_0, DU_EXODDF_DU_ODDF_DISP_CDE),
698 PINMUX_IPSR_MSEL(IP1_3_0, VI4_DATA2_B, SEL_VIN4_1),
699 PINMUX_IPSR_MSEL(IP1_3_0, PWM3_B, SEL_PWM3_1),
700 PINMUX_IPSR_MSEL(IP1_3_0, MSIOF3_SYNC_E, SEL_MSIOF3_4),
5560 IP1_3_0 ))
H A Dpfc-r8a77951.c142 #define GPSR2_2 F_(IRQ2, IP1_3_0)
261 #define IP1_3_0 FM(IRQ2) FM(QCPV_QDE) F_(0, 0) FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(VI4_DATA2_B) F_… macro
444 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
689 PINMUX_IPSR_GPSR(IP1_3_0, IRQ2),
690 PINMUX_IPSR_GPSR(IP1_3_0, QCPV_QDE),
691 PINMUX_IPSR_GPSR(IP1_3_0, DU_EXODDF_DU_ODDF_DISP_CDE),
692 PINMUX_IPSR_MSEL(IP1_3_0, VI4_DATA2_B, SEL_VIN4_1),
693 PINMUX_IPSR_MSEL(IP1_3_0, PWM3_B, SEL_PWM3_1),
694 PINMUX_IPSR_MSEL(IP1_3_0, MSIOF3_SYNC_E, SEL_MSIOF3_4),
5364 IP1_3_0 ))
H A Dpfc-r8a7796.c147 #define GPSR2_2 F_(IRQ2, IP1_3_0)
266 #define IP1_3_0 FM(IRQ2) FM(QCPV_QDE) F_(0, 0) FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(VI4_DATA2_B) F_… macro
449 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
694 PINMUX_IPSR_GPSR(IP1_3_0, IRQ2),
695 PINMUX_IPSR_GPSR(IP1_3_0, QCPV_QDE),
696 PINMUX_IPSR_GPSR(IP1_3_0, DU_EXODDF_DU_ODDF_DISP_CDE),
697 PINMUX_IPSR_MSEL(IP1_3_0, VI4_DATA2_B, SEL_VIN4_1),
698 PINMUX_IPSR_MSEL(IP1_3_0, PWM3_B, SEL_PWM3_1),
699 PINMUX_IPSR_MSEL(IP1_3_0, MSIOF3_SYNC_E, SEL_MSIOF3_4),
5319 IP1_3_0 ))
H A Dpfc-r8a77990.c129 #define GPSR2_9 F_(QSPI1_IO2, IP1_3_0)
222 #define IP1_3_0 FM(QSPI1_IO2) FM(RIF2_D1_A) FM(HTX3_C) FM(VI4_DATA3_A) F_(0, 0) F_(0, 0) F_(0… macro
386 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
586 PINMUX_IPSR_GPSR(IP1_3_0, QSPI1_IO2),
587 PINMUX_IPSR_MSEL(IP1_3_0, RIF2_D1_A, SEL_DRIF2_0),
588 PINMUX_IPSR_GPSR(IP1_3_0, HTX3_C),
589 PINMUX_IPSR_MSEL(IP1_3_0, VI4_DATA3_A, SEL_VIN4_0),
4806 IP1_3_0 ))
H A Dpfc-r8a7790.c862 PINMUX_IPSR_GPSR(IP1_3_0, D9),
863 PINMUX_IPSR_MSEL(IP1_3_0, SCIFA1_RXD_C, SEL_SCIFA1_2),
864 PINMUX_IPSR_GPSR(IP1_3_0, AVB_TXD1),
865 PINMUX_IPSR_MSEL(IP1_3_0, VI0_G1, SEL_VI0_0),
866 PINMUX_IPSR_MSEL(IP1_3_0, VI0_G1_B, SEL_VI0_1),
867 PINMUX_IPSR_MSEL(IP1_3_0, VI2_DATA1_VI2_B1, SEL_VI2_0),
H A Dpfc-r8a77470.c578 PINMUX_IPSR_GPSR(IP1_3_0, MMC0_D4),
579 PINMUX_IPSR_GPSR(IP1_3_0, SD1_CD),