Searched refs:IO_IRQ_BASE (Results 1 – 2 of 2) sorted by relevance
26 #define IO_IRQ_BASE 0x000 macro92 zevio_init_irq_base(zevio_irq_io + IO_IRQ_BASE); in zevio_of_init()109 gc->chip_types[0].regs.mask = IO_IRQ_BASE + IO_ENABLE; in zevio_of_init()110 gc->chip_types[0].regs.enable = IO_IRQ_BASE + IO_ENABLE; in zevio_of_init()111 gc->chip_types[0].regs.disable = IO_IRQ_BASE + IO_DISABLE; in zevio_of_init()112 gc->chip_types[0].regs.ack = IO_IRQ_BASE + IO_RESET; in zevio_of_init()
66 #define IO_IRQ_BASE 8 /* first IRQ assigned to I/O ASIC */ macro69 #define IO_IRQ_NR(n) ((n) + IO_IRQ_BASE)