Searched refs:INTx (Results 1 – 10 of 10) sorted by relevance
20 protocol describes this in-band legacy wire-interrupt INTx mechanism for22 describe problems with the Core IO handling of INTx message routing to the29 When in-band legacy INTx messages are forwarded to the PCH, they in turn103 When this bit is set. Local INTx messages received from the110 has been to make use of PCI Interrupt pin to INTx routing tables for112 line by default. Therefore, on chipsets where this INTx routing cannot be147 2.15.2 PCI Express Legacy INTx Support and Boot Interrupt
14 INTx interrupts (using _PRT).21 or if the device has INTx interrupts connected by platform interrupt
341 legacy INTx should chose the right one based on the msi_enabled
21 下面的PCI配置空间的方法、主桥转发到PCI的地址空间窗口（使用_CRS）以及传统的INTx26 提供电源管理或热插拔功能，或者如果设备有由平台中断控制器连接的INTx中断，需要一个_PRT
22 List of devices which can have interrupt control flag (INTx,
65 <TAbort- <MAbort- >SERR- <PERR- INTx-
28 …tus: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
801 INTx, enumerator
1153 Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
4878 all PCIe root ports use INTx for all services).