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Searched refs:INTR_STATUS (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hwio.h15 #define INTR_STATUS 0x014 macro
/linux/drivers/mtd/nand/raw/
H A Ddenali.h208 #define INTR_STATUS(bank) (0x410 + (bank) * 0x50) macro
H A Ddenali.c111 iowrite32(irq_status, denali->reg + INTR_STATUS(bank)); in denali_clear_irq()
132 irq_status = ioread32(denali->reg + INTR_STATUS(i)); in denali_isr()
H A Dcadence-nand-controller.c67 #define INTR_STATUS 0x0110 macro
776 writel_relaxed(irq_status->status, cdns_ctrl->reg + INTR_STATUS); in cadence_nand_clear_interrupt()
787 irq_status->status = readl_relaxed(cdns_ctrl->reg + INTR_STATUS); in cadence_nand_read_int_status()
1231 writel_relaxed(0xFFFFFFFF, cdns_ctrl->reg + INTR_STATUS); in cadence_nand_hw_init()