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Searched refs:INTR_MASK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/crypto/marvell/octeontx2/
H A Dotx2_cptpf_main.c77 INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs()
81 RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs()
84 INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs()
87 RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs()
93 INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs()
95 RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs()
98 INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs()
100 RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs()
110 RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(num_vfs)); in cptpf_disable_vf_flr_me_intrs()
116 RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(num_vfs)); in cptpf_disable_vf_flr_me_intrs()
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dvsc8211.c71 #define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \ macro
100 INTR_MASK); in vsc8211_intr_enable()
331 cause &= INTR_MASK; in vsc8211_intr_handler()
/linux/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dotx2_pf.c85 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
90 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
97 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
101 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
255 otx2_write64(pf, RVU_PF_VFME_INTX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
256 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
259 otx2_write64(pf, RVU_PF_VFFLR_INTX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
260 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
265 otx2_write64(pf, RVU_PF_VFME_INTX(1), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
267 INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
[all …]
/linux/drivers/extcon/
H A Dextcon-lc824206xa.c74 #define INTR_MASK \ macro
446 ret |= lc824206xa_write_reg(data, REG_INTR_MASK, INTR_MASK); in lc824206xa_probe()
/linux/drivers/net/ethernet/cavium/thunder/
H A Dnic_main.c103 #define INTR_MASK(vfs) ((vfs < 64) ? (BIT_ULL(vfs) - 1) : (~0ull)) in nic_enable_mbx_intr() macro
106 nic_reg_write(nic, NIC_PF_MAILBOX_INT, INTR_MASK(vf_cnt)); in nic_enable_mbx_intr()
109 nic_reg_write(nic, NIC_PF_MAILBOX_ENA_W1S, INTR_MASK(vf_cnt)); in nic_enable_mbx_intr()
113 INTR_MASK(vf_cnt - 64)); in nic_enable_mbx_intr()
115 INTR_MASK(vf_cnt - 64)); in nic_enable_mbx_intr()
/linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop.h248 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \ macro
H A Drockchip_drm_vop.c1801 active_irqs = VOP_INTR_GET_TYPE(vop, status, INTR_MASK); in vop_isr()
2060 VOP_INTR_SET_TYPE(vop, clear, INTR_MASK, 1); in vop_initial()
2061 VOP_INTR_SET_TYPE(vop, enable, INTR_MASK, 0); in vop_initial()
/linux/drivers/usb/host/
H A Dehci-hub.c358 mask = INTR_MASK; in ehci_bus_suspend()
506 ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable); in ehci_bus_resume()
H A Doxu210hp-hcd.c152 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
2849 status &= INTR_MASK; in oxu210_hcd_irq()
3144 writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */ in oxu_run()
3896 mask = INTR_MASK; in oxu_bus_suspend()
3983 writel(INTR_MASK, &oxu->regs->intr_enable); in oxu_bus_resume()
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_cpt.c206 INTR_MASK(nr)); in cpt_10k_unregister_interrupts()
292 INTR_MASK(nr)); in cpt_10k_register_interrupts()
/linux/drivers/usb/fotg210/
H A Dfotg210-hcd.c77 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) macro
5061 fotg210_writel(fotg210, INTR_MASK, in fotg210_run()
5125 masked_status = status & (INTR_MASK | STS_FLR); in fotg210_irq()