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Searched refs:INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE_MASK (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_sh_mask.h12489 #define INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE_MASK 0x20 macro
H A Ddce_10_0_sh_mask.h12483 #define INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE_MASK 0x20 macro
H A Ddce_11_2_sh_mask.h13105 #define INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE_MASK 0x20 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h95 #define INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE_MASK … macro
H A Ddcn_3_5_1_sh_mask.h46649 #define INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE_MASK … macro
H A Ddcn_3_5_0_sh_mask.h46670 #define INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE_MASK … macro