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Searched refs:IMX8ULP_CLK_SPLL3_PFD3_DIV1_GATE (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dimx8ulp-clock.h50 #define IMX8ULP_CLK_SPLL3_PFD3_DIV1_GATE 43 macro
/linux/drivers/clk/imx/
H A Dclk-imx8ulp.c185 …clks[IMX8ULP_CLK_SPLL3_PFD3_DIV1_GATE] = imx_clk_hw_gate_dis("spll3_pfd3_div1_gate", "spll3_pfd3",… in imx8ulp_clk_cgc1_init()